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author | Samin Guo <samin.guo@starfivetech.com> | 2023-06-14 06:00:03 +0300 |
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committer | Samin Guo <samin.guo@starfivetech.com> | 2023-07-10 06:38:08 +0300 |
commit | a76fba9179fa794ef7de7e7d49526f8da3ef219f (patch) | |
tree | 23265c2b1bad1df589461b4be6b8720cdcd72c7f /arch | |
parent | 7eb47f1ce4fb5ee18155fa3fa4679aed4d01a16d (diff) | |
download | u-boot-a76fba9179fa794ef7de7e7d49526f8da3ef219f.tar.xz |
dram: starfive: jh7110: Add 1G support
add 1G DDR tuning cfg
Signed-off-by: Samin Guo <samin.guo@starfivetech.com>
Diffstat (limited to 'arch')
-rw-r--r-- | arch/riscv/cpu/jh7110/dram.c | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/riscv/cpu/jh7110/dram.c b/arch/riscv/cpu/jh7110/dram.c index b5d1934f35..e141f87d41 100644 --- a/arch/riscv/cpu/jh7110/dram.c +++ b/arch/riscv/cpu/jh7110/dram.c @@ -18,6 +18,7 @@ DECLARE_GLOBAL_DATA_PTR; static bool check_eeprom_dram_info(phys_size_t size) { switch (size) { + case 0x40000000: case 0x80000000: case 0x100000000: case 0x200000000: |