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| author | Tom Rini <trini@konsulko.com> | 2023-02-17 17:58:06 +0300 |
|---|---|---|
| committer | Tom Rini <trini@konsulko.com> | 2023-02-17 17:58:06 +0300 |
| commit | fcb5117da8876fc5b2bf941528301218d1be7b1c (patch) | |
| tree | 5f8229da0d0585f66a7cac857002889616a021cc /configs/chromebook_kevin_defconfig | |
| parent | 0aa9470fdf8386c18ade43506d5541a515318b76 (diff) | |
| download | u-boot-fcb5117da8876fc5b2bf941528301218d1be7b1c.tar.xz | |
configs: Resync with savedefconfig
Rsync all defconfig files using moveconfig.py
Signed-off-by: Tom Rini <trini@konsulko.com>
Diffstat (limited to 'configs/chromebook_kevin_defconfig')
| -rw-r--r-- | configs/chromebook_kevin_defconfig | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/configs/chromebook_kevin_defconfig b/configs/chromebook_kevin_defconfig index 94d14d012d..bc0e89d0e3 100644 --- a/configs/chromebook_kevin_defconfig +++ b/configs/chromebook_kevin_defconfig @@ -5,22 +5,24 @@ CONFIG_ARCH_ROCKCHIP=y CONFIG_TEXT_BASE=0x00200000 CONFIG_SPL_GPIO=y CONFIG_NR_DRAM_BANKS=1 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x300000 CONFIG_ENV_OFFSET=0x3F8000 CONFIG_DEFAULT_DEVICE_TREE="rk3399-gru-kevin" CONFIG_SPL_TEXT_BASE=0xff8c2000 +CONFIG_DM_RESET=y CONFIG_ROCKCHIP_RK3399=y CONFIG_ROCKCHIP_BOOT_MODE_REG=0 CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x4000 # CONFIG_SPL_MMC is not set CONFIG_TARGET_CHROMEBOOK_KEVIN=y +CONFIG_SPL_STACK=0xff8effff CONFIG_DEBUG_UART_BASE=0xff1a0000 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI=y CONFIG_SYS_LOAD_ADDR=0x800800 CONFIG_DEBUG_UART=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x300000 CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-gru-kevin.dtb" # CONFIG_DISPLAY_CPUINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y @@ -37,7 +39,6 @@ CONFIG_SPL_BSS_MAX_SIZE=0x10000 CONFIG_HANDOFF=y # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK=0xff8effff CONFIG_SPL_STACK_R=y CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x4000 CONFIG_SPL_SPI_LOAD=y @@ -89,7 +90,6 @@ CONFIG_DM_REGULATOR_GPIO=y CONFIG_REGULATOR_RK8XX=y CONFIG_PWM_CROS_EC=y CONFIG_PWM_ROCKCHIP=y -CONFIG_DM_RESET=y CONFIG_DM_RNG=y CONFIG_RNG_ROCKCHIP=y CONFIG_DEBUG_UART_SHIFT=2 |