diff options
| author | Marek Vasut <marex@denx.de> | 2022-10-28 00:17:55 +0300 |
|---|---|---|
| committer | Patrice Chotard <patrice.chotard@foss.st.com> | 2022-12-07 19:06:26 +0300 |
| commit | ac803d9cae483d309ce1b0441cb4495a7cc9daba (patch) | |
| tree | d514a859da4a2e9b9d61c716ee2118b7ec9efd41 /configs/stm32mp15_dhcom_basic_defconfig | |
| parent | 666b1a712d81560c8081bd7704f1252130bf72f1 (diff) | |
| download | u-boot-ac803d9cae483d309ce1b0441cb4495a7cc9daba.tar.xz | |
ARM: stm32: Add boot counter to DHSOM
Add boot counter to STM32MP15xx DHSOM. This aligns the software with
other upstream DHSOM products which already do enable boot counter.
The boot counter on STM32MP15xx is placed in the TAMP block TAMP_BKPxR
register 19, right past register 17 and 18 used for CM4 resource table
and state by the Linux kernel. The TAMP_BKPxR register block is used
because its contents survives warm reset, but not cold reset.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Patrice Chotard <patrice.chotard@foss.st.com>
Cc: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Diffstat (limited to 'configs/stm32mp15_dhcom_basic_defconfig')
| -rw-r--r-- | configs/stm32mp15_dhcom_basic_defconfig | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/configs/stm32mp15_dhcom_basic_defconfig b/configs/stm32mp15_dhcom_basic_defconfig index 3ba396b967..c8093c4e15 100644 --- a/configs/stm32mp15_dhcom_basic_defconfig +++ b/configs/stm32mp15_dhcom_basic_defconfig @@ -8,6 +8,8 @@ CONFIG_DEFAULT_DEVICE_TREE="stm32mp15xx-dhcom-pdk2" CONFIG_SPL_TEXT_BASE=0x2FFC2500 CONFIG_SYS_PROMPT="STM32MP> " CONFIG_SPL_MMC=y +CONFIG_BOOTCOUNT_BOOTLIMIT=3 +CONFIG_SYS_BOOTCOUNT_ADDR=0x5C00A14C CONFIG_SPL=y CONFIG_TARGET_DH_STM32MP1_PDK2=y CONFIG_SPL_SPI_FLASH_SUPPORT=y @@ -74,6 +76,7 @@ CONFIG_CMD_SPI=y CONFIG_CMD_USB=y CONFIG_CMD_USB_MASS_STORAGE=y CONFIG_SYS_DISABLE_AUTOLOAD=y +CONFIG_CMD_BOOTCOUNT=y CONFIG_CMD_CACHE=y CONFIG_CMD_TIME=y CONFIG_CMD_TIMER=y @@ -99,6 +102,8 @@ CONFIG_IP_DEFRAG=y CONFIG_TFTP_TSIZE=y CONFIG_STM32_ADC=y CONFIG_SPL_BLOCK_CACHE=y +CONFIG_BOOTCOUNT_LIMIT=y +CONFIG_SYS_BOOTCOUNT_MAGIC=0xB0C40000 CONFIG_DFU_MMC=y CONFIG_DFU_MTD=y CONFIG_DFU_RAM=y |