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| author | T Karthik Reddy <t.karthik.reddy@xilinx.com> | 2020-08-14 12:02:15 +0300 |
|---|---|---|
| committer | Michal Simek <michal.simek@xilinx.com> | 2020-09-23 11:31:40 +0300 |
| commit | 31a359f87eaa66caf44dd10f89885736186537dd (patch) | |
| tree | 1a7c4ddd66be745184045b2f57d86fe38eba119c /configs/xilinx_zynqmp_virt_defconfig | |
| parent | 592ac773428a868a8ed4165f4b8a49afccea3919 (diff) | |
| download | u-boot-31a359f87eaa66caf44dd10f89885736186537dd.tar.xz | |
serial: uartlite: Add support to work with any endianness
This endinness changes are taken from linux uartlite driver.
Reset TX fifo in control register and check TX fifo empty
flag in lower byte of the status register to detect if it
is a little endian system. Based on this check, program the
registers with le32 or be32 through out the driver.
Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Diffstat (limited to 'configs/xilinx_zynqmp_virt_defconfig')
0 files changed, 0 insertions, 0 deletions