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| author | Yangbo Lu <yangbo.lu@nxp.com> | 2020-06-17 13:08:58 +0300 |
|---|---|---|
| committer | Priyanka Jain <priyanka.jain@nxp.com> | 2020-07-27 11:46:28 +0300 |
| commit | 39913acedd673c815af06da8dc3ef04c6e674d4a (patch) | |
| tree | 5efe60be8d831262b5ff2622d36ac089106c1118 /doc/README.fsl-esdhc | |
| parent | 4f73897b99cba1c051f4f5ed8a0e77619dedf8d6 (diff) | |
| download | u-boot-39913acedd673c815af06da8dc3ef04c6e674d4a.tar.xz | |
Move eSDHC adapter card identification to board files
The eSDHC adapter card identification and multiplexing configuration
through FPGA had been implemented in both common mmc driver and
fsl_esdhc driver. However it is proper to move these code to board
files and do it during board initialization. The FPGA registers are
also board specific.
This patch is to move eSDHC adapter card identification and
multiplexing configuration from mmc driver to specific board files.
And the option CONFIG_FSL_ESDHC_ADAPTER_IDENT is no longer needed.
Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
[Rebased, Removed T1040QDS change as board does not exist]
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
Diffstat (limited to 'doc/README.fsl-esdhc')
| -rw-r--r-- | doc/README.fsl-esdhc | 14 |
1 files changed, 0 insertions, 14 deletions
diff --git a/doc/README.fsl-esdhc b/doc/README.fsl-esdhc index 29cc6619ea..b620625dfb 100644 --- a/doc/README.fsl-esdhc +++ b/doc/README.fsl-esdhc @@ -1,19 +1,5 @@ Freescale esdhc-specific options - - CONFIG_FSL_ESDHC_ADAPTER_IDENT - Support Freescale adapter card type identification. This is implemented by - operating Qixis FPGA relevant registers. The STAT_PRES1 register has SDHC - Card ID[0:2] bits showing the type of card installed in the SDHC Adapter Slot. - - SDHC Card ID[0:2] Adapter Card Type - 0b000 reserved - 0b001 eMMC Card Rev4.5 - 0b010 SD/MMC Legacy Card - 0b011 eMMC Card Rev4.4 - 0b100 reserved - 0b101 MMC Card - 0b110 SD Card Rev2.0/3.0 - 0b111 No card is present - CONFIG_SYS_FSL_ESDHC_LE ESDHC IP is in little-endian mode. Accessing ESDHC registers can be determined by ESDHC IP's endian mode or processor's endian mode. |