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author | Tom Rini <trini@konsulko.com> | 2017-11-28 17:30:36 +0300 |
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committer | Tom Rini <trini@konsulko.com> | 2017-11-28 17:30:36 +0300 |
commit | 65972a0b6204aa298b70b7ebd755bb1ce1ed53ee (patch) | |
tree | bcdafb9062836c792bbe778c860935b79496a80d /doc/device-tree-bindings/fpga/altera-socfpga-a10-fpga-mgr.txt | |
parent | 53fe692652c8777d10334f64f8dce308b539df91 (diff) | |
parent | eb57c0be14d114c7d0965918154fdfb414634108 (diff) | |
download | u-boot-65972a0b6204aa298b70b7ebd755bb1ce1ed53ee.tar.xz |
Merge git://git.denx.de/u-boot-socfpga
Diffstat (limited to 'doc/device-tree-bindings/fpga/altera-socfpga-a10-fpga-mgr.txt')
-rw-r--r-- | doc/device-tree-bindings/fpga/altera-socfpga-a10-fpga-mgr.txt | 19 |
1 files changed, 19 insertions, 0 deletions
diff --git a/doc/device-tree-bindings/fpga/altera-socfpga-a10-fpga-mgr.txt b/doc/device-tree-bindings/fpga/altera-socfpga-a10-fpga-mgr.txt new file mode 100644 index 0000000000..2fd8e7a847 --- /dev/null +++ b/doc/device-tree-bindings/fpga/altera-socfpga-a10-fpga-mgr.txt @@ -0,0 +1,19 @@ +Altera SOCFPGA Arria10 FPGA Manager + +Required properties: +- compatible : should contain "altr,socfpga-a10-fpga-mgr" +- reg : base address and size for memory mapped io. + - The first index is for FPGA manager register access. + - The second index is for writing FPGA configuration data. +- resets : Phandle and reset specifier for the device's reset. +- clocks : Clocks used by the device. + +Example: + + fpga_mgr: fpga-mgr@ffd03000 { + compatible = "altr,socfpga-a10-fpga-mgr"; + reg = <0xffd03000 0x100 + 0xffcfe400 0x20>; + clocks = <&l4_mp_clk>; + resets = <&rst FPGAMGR_RESET>; + }; |