diff options
| author | Marek Vasut <marek.vasut+renesas@gmail.com> | 2021-04-25 22:53:05 +0300 |
|---|---|---|
| committer | Marek Vasut <marek.vasut+renesas@gmail.com> | 2021-05-21 16:00:17 +0300 |
| commit | e9354091995c9129f1ebf7a568a42e17c2b2f96e (patch) | |
| tree | 9c51563a2f29c1e79e9ab7e9f4c8afc82756ac78 /drivers/clk/renesas/r8a7790-cpg-mssr.c | |
| parent | 12dd238a64523540b8f790bb6d92750fd3831cdb (diff) | |
| download | u-boot-e9354091995c9129f1ebf7a568a42e17c2b2f96e.tar.xz | |
clk: renesas: Make reset controller modemr register offset configurable
The MODEMR register offset changed on R8A779A0, make the MODEMR offset
configurable. Fill the offset in on all clock drivers. No functional
change.
Based off "clk: renesas: Make CPG Reset MODEMR offset accessible from
struct cpg_mssr_info" by Hai Pham <hai.pham.ud@renesas.com>
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Diffstat (limited to 'drivers/clk/renesas/r8a7790-cpg-mssr.c')
| -rw-r--r-- | drivers/clk/renesas/r8a7790-cpg-mssr.c | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/clk/renesas/r8a7790-cpg-mssr.c b/drivers/clk/renesas/r8a7790-cpg-mssr.c index 8d616476c7..1f3477fa6e 100644 --- a/drivers/clk/renesas/r8a7790-cpg-mssr.c +++ b/drivers/clk/renesas/r8a7790-cpg-mssr.c @@ -263,6 +263,7 @@ static const struct cpg_mssr_info r8a7790_cpg_mssr_info = { .mstp_table = r8a7790_mstp_table, .mstp_table_size = ARRAY_SIZE(r8a7790_mstp_table), .reset_node = "renesas,r8a7790-rst", + .reset_modemr_offset = CPG_RST_MODEMR, .extal_usb_node = "usb_extal", .mod_clk_base = MOD_CLK_BASE, .clk_extal_id = CLK_EXTAL, |