summaryrefslogtreecommitdiff
path: root/drivers/ddr
diff options
context:
space:
mode:
authorSimon Glass <sjg@chromium.org>2020-12-04 02:55:23 +0300
committerSimon Glass <sjg@chromium.org>2020-12-14 02:51:09 +0300
commit8a8d24bdf174851ebb8607f359d54b72e3283b97 (patch)
tree89fe2b9fd0c33209ce154170f9bda61f624dd9cd /drivers/ddr
parentb012ff1f1b0d662587dcf8707fe7cbf1c1f35d2f (diff)
downloadu-boot-8a8d24bdf174851ebb8607f359d54b72e3283b97.tar.xz
dm: treewide: Rename ..._platdata variables to just ..._plat
Try to maintain some consistency between these variables by using _plat as a suffix for them. Signed-off-by: Simon Glass <sjg@chromium.org>
Diffstat (limited to 'drivers/ddr')
-rw-r--r--drivers/ddr/altera/sdram_agilex.c2
-rw-r--r--drivers/ddr/altera/sdram_gen5.c8
-rw-r--r--drivers/ddr/altera/sdram_s10.c2
-rw-r--r--drivers/ddr/altera/sdram_soc64.c18
-rw-r--r--drivers/ddr/altera/sdram_soc64.h16
5 files changed, 23 insertions, 23 deletions
diff --git a/drivers/ddr/altera/sdram_agilex.c b/drivers/ddr/altera/sdram_agilex.c
index 497ff7869b..868bf142b4 100644
--- a/drivers/ddr/altera/sdram_agilex.c
+++ b/drivers/ddr/altera/sdram_agilex.c
@@ -25,7 +25,7 @@ DECLARE_GLOBAL_DATA_PTR;
int sdram_mmr_init_full(struct udevice *dev)
{
- struct altera_sdram_platdata *plat = dev->plat;
+ struct altera_sdram_plat *plat = dev->plat;
struct altera_sdram_priv *priv = dev_get_priv(dev);
u32 i;
int ret;
diff --git a/drivers/ddr/altera/sdram_gen5.c b/drivers/ddr/altera/sdram_gen5.c
index 286961ca33..3ffe057543 100644
--- a/drivers/ddr/altera/sdram_gen5.c
+++ b/drivers/ddr/altera/sdram_gen5.c
@@ -27,7 +27,7 @@ struct altera_gen5_sdram_priv {
struct ram_info info;
};
-struct altera_gen5_sdram_platdata {
+struct altera_gen5_sdram_plat {
struct socfpga_sdr *sdr;
};
@@ -565,7 +565,7 @@ static unsigned long sdram_calculate_size(struct socfpga_sdr_ctrl *sdr_ctrl)
static int altera_gen5_sdram_of_to_plat(struct udevice *dev)
{
- struct altera_gen5_sdram_platdata *plat = dev->plat;
+ struct altera_gen5_sdram_plat *plat = dev->plat;
plat->sdr = (struct socfpga_sdr *)devfdt_get_addr_index(dev, 0);
if (!plat->sdr)
@@ -578,7 +578,7 @@ static int altera_gen5_sdram_probe(struct udevice *dev)
{
int ret;
unsigned long sdram_size;
- struct altera_gen5_sdram_platdata *plat = dev->plat;
+ struct altera_gen5_sdram_plat *plat = dev->plat;
struct altera_gen5_sdram_priv *priv = dev_get_priv(dev);
struct socfpga_sdr_ctrl *sdr_ctrl = &plat->sdr->sdr_ctrl;
struct reset_ctl_bulk resets;
@@ -647,7 +647,7 @@ U_BOOT_DRIVER(altera_gen5_sdram) = {
.of_match = altera_gen5_sdram_ids,
.ops = &altera_gen5_sdram_ops,
.of_to_plat = altera_gen5_sdram_of_to_plat,
- .plat_auto = sizeof(struct altera_gen5_sdram_platdata),
+ .plat_auto = sizeof(struct altera_gen5_sdram_plat),
.probe = altera_gen5_sdram_probe,
.priv_auto = sizeof(struct altera_gen5_sdram_priv),
};
diff --git a/drivers/ddr/altera/sdram_s10.c b/drivers/ddr/altera/sdram_s10.c
index 8028d89f22..984dc32442 100644
--- a/drivers/ddr/altera/sdram_s10.c
+++ b/drivers/ddr/altera/sdram_s10.c
@@ -70,7 +70,7 @@ int match_ddr_conf(u32 ddr_conf)
*/
int sdram_mmr_init_full(struct udevice *dev)
{
- struct altera_sdram_platdata *plat = dev->plat;
+ struct altera_sdram_plat *plat = dev->plat;
struct altera_sdram_priv *priv = dev_get_priv(dev);
u32 update_value, io48_value, ddrioctl;
u32 i;
diff --git a/drivers/ddr/altera/sdram_soc64.c b/drivers/ddr/altera/sdram_soc64.c
index 0bd40c2a0d..7e77c7b073 100644
--- a/drivers/ddr/altera/sdram_soc64.c
+++ b/drivers/ddr/altera/sdram_soc64.c
@@ -27,29 +27,29 @@
#define PGTABLE_OFF 0x4000
-u32 hmc_readl(struct altera_sdram_platdata *plat, u32 reg)
+u32 hmc_readl(struct altera_sdram_plat *plat, u32 reg)
{
return readl(plat->iomhc + reg);
}
-u32 hmc_ecc_readl(struct altera_sdram_platdata *plat, u32 reg)
+u32 hmc_ecc_readl(struct altera_sdram_plat *plat, u32 reg)
{
return readl(plat->hmc + reg);
}
-u32 hmc_ecc_writel(struct altera_sdram_platdata *plat,
+u32 hmc_ecc_writel(struct altera_sdram_plat *plat,
u32 data, u32 reg)
{
return writel(data, plat->hmc + reg);
}
-u32 ddr_sch_writel(struct altera_sdram_platdata *plat, u32 data,
+u32 ddr_sch_writel(struct altera_sdram_plat *plat, u32 data,
u32 reg)
{
return writel(data, plat->ddr_sch + reg);
}
-int emif_clear(struct altera_sdram_platdata *plat)
+int emif_clear(struct altera_sdram_plat *plat)
{
hmc_ecc_writel(plat, 0, RSTHANDSHAKECTRL);
@@ -59,7 +59,7 @@ int emif_clear(struct altera_sdram_platdata *plat)
false, 1000, false);
}
-int emif_reset(struct altera_sdram_platdata *plat)
+int emif_reset(struct altera_sdram_plat *plat)
{
u32 c2s, s2c, ret;
@@ -214,7 +214,7 @@ void sdram_size_check(struct bd_info *bd)
* Calculate SDRAM device size based on SDRAM controller parameters.
* Size is specified in bytes.
*/
-phys_size_t sdram_calculate_size(struct altera_sdram_platdata *plat)
+phys_size_t sdram_calculate_size(struct altera_sdram_plat *plat)
{
u32 dramaddrw = hmc_readl(plat, DRAMADDRW);
@@ -232,7 +232,7 @@ phys_size_t sdram_calculate_size(struct altera_sdram_platdata *plat)
static int altera_sdram_of_to_plat(struct udevice *dev)
{
- struct altera_sdram_platdata *plat = dev->plat;
+ struct altera_sdram_plat *plat = dev->plat;
fdt_addr_t addr;
addr = dev_read_addr_index(dev, 0);
@@ -304,7 +304,7 @@ U_BOOT_DRIVER(altera_sdram) = {
.of_match = altera_sdram_ids,
.ops = &altera_sdram_ops,
.of_to_plat = altera_sdram_of_to_plat,
- .plat_auto = sizeof(struct altera_sdram_platdata),
+ .plat_auto = sizeof(struct altera_sdram_plat),
.probe = altera_sdram_probe,
.priv_auto = sizeof(struct altera_sdram_priv),
};
diff --git a/drivers/ddr/altera/sdram_soc64.h b/drivers/ddr/altera/sdram_soc64.h
index 4a830e7ec1..8af0afc410 100644
--- a/drivers/ddr/altera/sdram_soc64.h
+++ b/drivers/ddr/altera/sdram_soc64.h
@@ -14,7 +14,7 @@ struct altera_sdram_priv {
struct reset_ctl_bulk resets;
};
-struct altera_sdram_platdata {
+struct altera_sdram_plat {
void __iomem *hmc;
void __iomem *ddr_sch;
void __iomem *iomhc;
@@ -169,19 +169,19 @@ struct altera_sdram_platdata {
#define FW_HMC_ADAPTOR_REG_ADDR 0xf8020004
#define FW_HMC_ADAPTOR_MPU_MASK BIT(0)
-u32 hmc_readl(struct altera_sdram_platdata *plat, u32 reg);
-u32 hmc_ecc_readl(struct altera_sdram_platdata *plat, u32 reg);
-u32 hmc_ecc_writel(struct altera_sdram_platdata *plat,
+u32 hmc_readl(struct altera_sdram_plat *plat, u32 reg);
+u32 hmc_ecc_readl(struct altera_sdram_plat *plat, u32 reg);
+u32 hmc_ecc_writel(struct altera_sdram_plat *plat,
u32 data, u32 reg);
-u32 ddr_sch_writel(struct altera_sdram_platdata *plat, u32 data,
+u32 ddr_sch_writel(struct altera_sdram_plat *plat, u32 data,
u32 reg);
-int emif_clear(struct altera_sdram_platdata *plat);
-int emif_reset(struct altera_sdram_platdata *plat);
+int emif_clear(struct altera_sdram_plat *plat);
+int emif_reset(struct altera_sdram_plat *plat);
int poll_hmc_clock_status(void);
void sdram_clear_mem(phys_addr_t addr, phys_size_t size);
void sdram_init_ecc_bits(struct bd_info *bd);
void sdram_size_check(struct bd_info *bd);
-phys_size_t sdram_calculate_size(struct altera_sdram_platdata *plat);
+phys_size_t sdram_calculate_size(struct altera_sdram_plat *plat);
int sdram_mmr_init_full(struct udevice *dev);
#endif /* _SDRAM_SOC64_H_ */