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authorAshish Kumar <Ashish.Kumar@nxp.com>2018-02-19 11:44:09 +0300
committerYork Sun <york.sun@nxp.com>2018-03-20 18:25:34 +0300
commitb555e293b3ccfea3dd928f942cc9239e26b7ea9a (patch)
treef9236f11f838179237eea55bc010471de79412c2 /include/configs/ls1088aqds.h
parentb8aa55cb6414e512cce30bb7db3268eea934466d (diff)
downloadu-boot-b555e293b3ccfea3dd928f942cc9239e26b7ea9a.tar.xz
armv8: ls1088qds: Remove CONFIG_ from local defines for FPGA
Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
Diffstat (limited to 'include/configs/ls1088aqds.h')
-rw-r--r--include/configs/ls1088aqds.h16
1 files changed, 8 insertions, 8 deletions
diff --git a/include/configs/ls1088aqds.h b/include/configs/ls1088aqds.h
index 897a0497bb..5de364e08b 100644
--- a/include/configs/ls1088aqds.h
+++ b/include/configs/ls1088aqds.h
@@ -197,7 +197,7 @@ unsigned long get_board_ddr_clk(void);
| CSPR_MSEL_GPCM \
| CSPR_V)
-#define CONFIG_SYS_FPGA_AMASK IFC_AMASK(64*1024)
+#define SYS_FPGA_AMASK IFC_AMASK(64 * 1024)
#if defined(CONFIG_QSPI_BOOT) || defined(CONFIG_SD_BOOT_QSPI)
#define CONFIG_SYS_FPGA_CSOR CSOR_GPCM_ADM_SHIFT(0)
#else
@@ -226,7 +226,7 @@ unsigned long get_board_ddr_clk(void);
#define CONFIG_SYS_CSPR2_EXT CONFIG_SYS_FPGA_CSPR_EXT
#define CONFIG_SYS_CSPR2 CONFIG_SYS_FPGA_CSPR
#define CONFIG_SYS_CSPR2_FINAL SYS_FPGA_CSPR_FINAL
-#define CONFIG_SYS_AMASK2 CONFIG_SYS_FPGA_AMASK
+#define CONFIG_SYS_AMASK2 SYS_FPGA_AMASK
#define CONFIG_SYS_CSOR2 CONFIG_SYS_FPGA_CSOR
#define CONFIG_SYS_CS2_FTIM0 SYS_FPGA_CS_FTIM0
#define CONFIG_SYS_CS2_FTIM1 SYS_FPGA_CS_FTIM1
@@ -262,13 +262,13 @@ unsigned long get_board_ddr_clk(void);
#define CONFIG_SYS_CS2_FTIM3 CONFIG_SYS_NAND_FTIM3
#define CONFIG_SYS_CSPR3_EXT CONFIG_SYS_FPGA_CSPR_EXT
#define CONFIG_SYS_CSPR3 CONFIG_SYS_FPGA_CSPR
-#define CONFIG_SYS_CSPR3_FINAL CONFIG_SYS_FPGA_CSPR_FINAL
-#define CONFIG_SYS_AMASK3 CONFIG_SYS_FPGA_AMASK
+#define CONFIG_SYS_CSPR3_FINAL SYS_FPGA_CSPR_FINAL
+#define CONFIG_SYS_AMASK3 SYS_FPGA_AMASK
#define CONFIG_SYS_CSOR3 CONFIG_SYS_FPGA_CSOR
-#define CONFIG_SYS_CS3_FTIM0 CONFIG_SYS_FPGA_CS_FTIM0
-#define CONFIG_SYS_CS3_FTIM1 CONFIG_SYS_FPGA_CS_FTIM1
-#define CONFIG_SYS_CS3_FTIM2 CONFIG_SYS_FPGA_CS_FTIM2
-#define CONFIG_SYS_CS3_FTIM3 CONFIG_SYS_FPGA_CS_FTIM3
+#define CONFIG_SYS_CS3_FTIM0 SYS_FPGA_CS_FTIM0
+#define CONFIG_SYS_CS3_FTIM1 SYS_FPGA_CS_FTIM1
+#define CONFIG_SYS_CS3_FTIM2 SYS_FPGA_CS_FTIM2
+#define CONFIG_SYS_CS3_FTIM3 SYS_FPGA_CS_FTIM3
#endif
#define CONFIG_SYS_LS_MC_BOOT_TIMEOUT_MS 5000