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| author | Marek Vasut <marek.vasut+renesas@gmail.com> | 2019-05-07 22:51:06 +0300 |
|---|---|---|
| committer | Marek Vasut <marex@denx.de> | 2019-05-10 23:43:18 +0300 |
| commit | 58300f399f71ddc0ebdcd344cdf9f973aa0613b2 (patch) | |
| tree | dab14f6dd401e350e9cbbb72b37e50a48a9f9258 /include/configs | |
| parent | 5736453c6f2732a0d78a30978d1692801dad5d81 (diff) | |
| download | u-boot-58300f399f71ddc0ebdcd344cdf9f973aa0613b2.tar.xz | |
sh: rsk7264: Remove the board
Last change to this board was done in 2016, has no prospects of
ever being converted to DM, drop it.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Chris Brandt <chris.brandt@renesas.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Cc: Vladimir Zapolskiy <vz@mleia.com>
Cc: Yoshihiro Shimoda <shimoda.yoshihiro.uh@renesas.com>
Diffstat (limited to 'include/configs')
| -rw-r--r-- | include/configs/rsk7264.h | 52 |
1 files changed, 0 insertions, 52 deletions
diff --git a/include/configs/rsk7264.h b/include/configs/rsk7264.h deleted file mode 100644 index e91e4bd416..0000000000 --- a/include/configs/rsk7264.h +++ /dev/null @@ -1,52 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0+ */ -/* - * Configuation settings for the Renesas RSK2+SH7264 board - * - * Copyright (C) 2011 Renesas Electronics Europe Ltd. - * Copyright (C) 2008 Nobuhiro Iwamatsu - * Copyright (C) 2008 Renesas Solutions Corp. - */ - -#ifndef __RSK7264_H -#define __RSK7264_H - -#define CONFIG_CPU_SH7264 1 - -#define CONFIG_DISPLAY_BOARDINFO - -#define CONFIG_SYS_BAUDRATE_TABLE { CONFIG_BAUDRATE } - -#define CONFIG_SYS_PBSIZE 256 /* Buffer size for Console output */ - -/* Serial */ -#define CONFIG_CONS_SCIF3 1 - -/* Memory */ -/* u-boot relocated to top 256KB of ram */ -#define CONFIG_SYS_SDRAM_BASE 0x0C000000 -#define CONFIG_SYS_SDRAM_SIZE (64 * 1024 * 1024) - -#define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE -#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_TEXT_BASE - 0x100000) -#define CONFIG_SYS_MALLOC_LEN (256 * 1024) -#define CONFIG_SYS_MONITOR_LEN (128 * 1024) -#define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 4*1024*1024) - -/* Flash */ -#define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT -#define CONFIG_SYS_FLASH_BASE 0x20000000 /* Non-cached */ -#define CONFIG_SYS_MAX_FLASH_BANKS 1 -#define CONFIG_SYS_MAX_FLASH_SECT 512 - -#define CONFIG_ENV_OFFSET (128 * 1024) -#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + CONFIG_ENV_OFFSET) -#define CONFIG_ENV_SECT_SIZE (128 * 1024) -#define CONFIG_ENV_SIZE CONFIG_ENV_SECT_SIZE - -/* Board Clock */ -#define CONFIG_SYS_CLK_FREQ 36000000 -#define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ -#define CMT_CLK_DIVIDER 32 /* 8 (default), 32, 128 or 512 */ -#define CONFIG_SH_CMT_CLK_FREQ (CONFIG_SYS_CLK_FREQ / CMT_CLK_DIVIDER) - -#endif /* __RSK7264_H */ |