diff options
Diffstat (limited to 'arch/arm/include/asm/arch-ls102xa/config.h')
| -rw-r--r-- | arch/arm/include/asm/arch-ls102xa/config.h | 22 |
1 files changed, 11 insertions, 11 deletions
diff --git a/arch/arm/include/asm/arch-ls102xa/config.h b/arch/arm/include/asm/arch-ls102xa/config.h index 62026bda9e..6413a307d2 100644 --- a/arch/arm/include/asm/arch-ls102xa/config.h +++ b/arch/arm/include/asm/arch-ls102xa/config.h @@ -11,36 +11,36 @@ #define OCRAM_BASE_S_ADDR 0x10010000 #define OCRAM_S_SIZE 0x00010000 -#define CONFIG_SYS_DCSRBAR 0x20000000 +#define CFG_SYS_DCSRBAR 0x20000000 -#define CONFIG_SYS_DCSR_DCFG_ADDR (CONFIG_SYS_DCSRBAR + 0x00220000) -#define SYS_FSL_DCSR_RCPM_ADDR (CONFIG_SYS_DCSRBAR + 0x00222000) +#define CFG_SYS_DCSR_DCFG_ADDR (CFG_SYS_DCSRBAR + 0x00220000) +#define SYS_FSL_DCSR_RCPM_ADDR (CFG_SYS_DCSRBAR + 0x00222000) #define SYS_FSL_GIC_ADDR (CONFIG_SYS_IMMR + 0x00400000) #define CFG_SYS_FSL_DDR_ADDR (CONFIG_SYS_IMMR + 0x00080000) #define CFG_SYS_FSL_CSU_ADDR (CONFIG_SYS_IMMR + 0x00510000) -#define CONFIG_SYS_IFC_ADDR (CONFIG_SYS_IMMR + 0x00530000) +#define CFG_SYS_IFC_ADDR (CONFIG_SYS_IMMR + 0x00530000) #define CFG_SYS_FSL_ESDHC_ADDR (CONFIG_SYS_IMMR + 0x00560000) #define CFG_SYS_FSL_SCFG_ADDR (CONFIG_SYS_IMMR + 0x00570000) #define CFG_SYS_FSL_SEC_ADDR (CONFIG_SYS_IMMR + 0x700000) #define CFG_SYS_FSL_JR0_ADDR (CONFIG_SYS_IMMR + 0x710000) -#define CONFIG_SYS_SEC_MON_ADDR (CONFIG_SYS_IMMR + 0x00e90000) -#define CONFIG_SYS_SFP_ADDR (CONFIG_SYS_IMMR + 0x00e80200) +#define CFG_SYS_SEC_MON_ADDR (CONFIG_SYS_IMMR + 0x00e90000) +#define CFG_SYS_SFP_ADDR (CONFIG_SYS_IMMR + 0x00e80200) #define CFG_SYS_FSL_SERDES_ADDR (CONFIG_SYS_IMMR + 0x00ea0000) #define CFG_SYS_FSL_GUTS_ADDR (CONFIG_SYS_IMMR + 0x00ee0000) #define CFG_SYS_FSL_LS1_CLK_ADDR (CONFIG_SYS_IMMR + 0x00ee1000) #define CFG_SYS_FSL_RCPM_ADDR (CONFIG_SYS_IMMR + 0x00ee2000) #define CFG_SYS_NS16550_COM1 (CONFIG_SYS_IMMR + 0x011c0500) #define CFG_SYS_NS16550_COM2 (CONFIG_SYS_IMMR + 0x011d0500) -#define CONFIG_SYS_XHCI_USB1_ADDR (CONFIG_SYS_IMMR + 0x02100000) +#define CFG_SYS_XHCI_USB1_ADDR (CONFIG_SYS_IMMR + 0x02100000) #define CFG_SYS_FSL_SEC_OFFSET 0x00700000 #define CFG_SYS_FSL_JR0_OFFSET 0x00710000 -#define CONFIG_SYS_TSEC1_OFFSET 0x01d10000 -#define CONFIG_SYS_MDIO1_OFFSET 0x01d24000 +#define CFG_SYS_TSEC1_OFFSET 0x01d10000 +#define CFG_SYS_MDIO1_OFFSET 0x01d24000 -#define TSEC_BASE_ADDR (CONFIG_SYS_IMMR + CONFIG_SYS_TSEC1_OFFSET) -#define MDIO_BASE_ADDR (CONFIG_SYS_IMMR + CONFIG_SYS_MDIO1_OFFSET) +#define TSEC_BASE_ADDR (CONFIG_SYS_IMMR + CFG_SYS_TSEC1_OFFSET) +#define MDIO_BASE_ADDR (CONFIG_SYS_IMMR + CFG_SYS_MDIO1_OFFSET) #define SCTR_BASE_ADDR (CONFIG_SYS_IMMR + 0x01b00000) |