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path: root/drivers/clk/microchip/mpfs_clk.h
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Diffstat (limited to 'drivers/clk/microchip/mpfs_clk.h')
-rw-r--r--drivers/clk/microchip/mpfs_clk.h6
1 files changed, 3 insertions, 3 deletions
diff --git a/drivers/clk/microchip/mpfs_clk.h b/drivers/clk/microchip/mpfs_clk.h
index 8e3fc55ae3..442562a5e7 100644
--- a/drivers/clk/microchip/mpfs_clk.h
+++ b/drivers/clk/microchip/mpfs_clk.h
@@ -13,7 +13,7 @@
* @base: base address of the mpfs system register.
* @clk_rate: the mpfs pll clock rate.
* @parent_name: a pointer to parent clock name.
- * @return zero on success, or a negative error code.
+ * Return: zero on success, or a negative error code.
*/
int mpfs_clk_register_cfgs(void __iomem *base, u32 clk_rate,
const char *parent_name);
@@ -23,7 +23,7 @@ int mpfs_clk_register_cfgs(void __iomem *base, u32 clk_rate,
* @base: base address of the mpfs system register.
* @clk_rate: the mpfs pll clock rate.
* @parent_name: a pointer to parent clock name.
- * @return zero on success, or a negative error code.
+ * Return: zero on success, or a negative error code.
*/
int mpfs_clk_register_periphs(void __iomem *base, u32 clk_rate,
const char *parent_name);
@@ -35,7 +35,7 @@ int mpfs_clk_register_periphs(void __iomem *base, u32 clk_rate,
* @table: a pointer to clock divider table.
* @width: width of the divider bit field.
* @flags: common clock framework flags.
- * @return divider value on success, or a negative error code.
+ * Return: divider value on success, or a negative error code.
*/
int divider_get_val(unsigned long rate, unsigned long parent_rate,
const struct clk_div_table *table,