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JH7110_VisionFive2_devel-v3.9.3
dubhe_fpga_dev_v2023.10
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StarFive Tech U-Boot for VisionFive (JH7110) boards (mirror)
Andrey V.Kosteltsev
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path:
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arch
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arm
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cpu
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armv7
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cache_v7.c
Age
Commit message (
Expand
)
Author
Files
Lines
2020-05-19
common: Drop net.h from common header
Simon Glass
1
-0
/
+1
2019-12-03
common: Move ARM cache operations out of common.h
Simon Glass
1
-0
/
+1
2019-05-18
CONFIG_SPL_SYS_[DI]CACHE_OFF: add
Trevor Woerner
1
-4
/
+4
2018-05-07
SPDX: Convert all of our single license tags to Linux Kernel style
Tom Rini
1
-2
/
+1
2016-08-05
ARM: Rework and correct barrier definitions
Tom Rini
1
-5
/
+5
2016-07-15
arm: Don't invalidate unaligned cache regions
Simon Glass
1
-21
/
+2
2016-07-15
arm: Move check_cache_range() into a common place
Simon Glass
1
-17
/
+0
2016-07-15
arm: cache: add missing dummy functions for when dcache disabled
Daniel Allred
1
-0
/
+8
2016-04-12
arm: Replace v7_maint_dcache_all(ARMV7_DCACHE_INVAL_ALL) with asm code
Hans de Goede
1
-96
/
+4
2016-04-12
arm: Replace v7_maint_dcache_all(ARMV7_DCACHE_CLEAN_INVAL_ALL) with asm code
Hans de Goede
1
-35
/
+6
2016-01-31
arm: cache: Implement cache range check for v7
Marek Vasut
1
-0
/
+21
2015-08-13
ARM: cache: implement a default weak flush_cache() function
Wu, Josh
1
-13
/
+0
2015-08-13
ARM: cache: add an empty stub function for invalidate/flush dcache
Wu, Josh
1
-8
/
+0
2015-04-16
ARM: cpu: Add ARMv7 barrier operations support
Valentine Barshak
1
-7
/
+7
2014-11-12
ARM: cache_v7: Various minor cleanups
Thierry Reding
1
-7
/
+7
2014-07-04
ARM: cache_v7: use __weak
Jeroen Hofstee
1
-38
/
+7
2013-07-24
Add GPL-2.0+ SPDX-License-Identifier to source files
Wolfgang Denk
1
-17
/
+1
2013-03-28
ARM: mmu: Set domain permissions to client access
R Sricharan
1
-0
/
+3
2012-11-19
arm: Add control over cachability of memory regions
Simon Glass
1
-0
/
+11
2011-09-04
armv7: cache: remove flush on un-aligned invalidate
Aneesh V
1
-6
/
+8
2011-09-04
armv7: stronger barrier for cache-maintenance operations
Aneesh V
1
-6
/
+6
2011-07-04
armv7: cache maintenance operations for armv7
Aneesh V
1
-0
/
+394