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starfive-tech/u-boot.git
Fedora_JH7100_2021.04
Fedora_JH7100_2021.07
Fedora_JH7100_upstream
Fedora_JH7100_upstream_devel
JH7100_Multimedia_V0.1.0
JH7100_VisionFive_OH_dev
JH7100_VisionFive_devel
JH7100_starlight_multimedia
JH7100_upstream
JH7100_upstream_devel
JH7110_VisionFive2_devel
JH7110_VisionFive2_devel-v3.9.3
dubhe_fpga_dev_v2023.10
master
rtthread_AMP
visionfive_devel
StarFive Tech U-Boot for VisionFive (JH7110) boards (mirror)
Andrey V.Kosteltsev
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path:
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arch
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arm
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cpu
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armv7
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virt-v7.c
Age
Commit message (
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Author
Files
Lines
2020-05-19
common: Drop net.h from common header
Simon Glass
1
-0
/
+1
2019-12-03
common: Move some SMP functions out of common.h
Simon Glass
1
-0
/
+1
2018-05-07
SPDX: Convert all of our single license tags to Linux Kernel style
Tom Rini
1
-2
/
+1
2016-08-12
ARM: non-sec: flush code cacheline aligned
Stefan Agner
1
-1
/
+3
2015-05-13
tegra124: Reserve secure RAM using MC_SECURITY_CFG{0, 1}_0
Ian Campbell
1
-0
/
+5
2015-05-13
ARM: Add board-specific initialization hook for PSCI
Jan Kiszka
1
-0
/
+6
2015-03-01
ARM: HYP/non-sec: relocation before enable secondary cores
Peng Fan
1
-1
/
+8
2015-01-24
ARM: HYP/non-sec: Make variable gic_dist_addr as a local one
tang yuantian
1
-2
/
+7
2014-07-28
ARM: HYP/non-sec: remove MIDR check to validate CBAR
Marc Zyngier
1
-17
/
+0
2014-07-28
ARM: HYP/non-sec: allow relocation to secure RAM
Marc Zyngier
1
-40
/
+19
2013-10-07
ARM: virtualization: replace verbose license with SPDX identifier
Andre Przywara
1
-18
/
+2
2013-10-03
ARM: extend non-secure switch to also go into HYP mode
Andre Przywara
1
-0
/
+37
2013-10-03
ARM: add SMP support for non-secure switch
Andre Przywara
1
-1
/
+15
2013-10-03
ARM: add C function to switch to non-secure state
Andre Przywara
1
-0
/
+122