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2021-06-23arm64: zynqmp: Update usb dwc3 DT descriptionMichal Simek1-2/+18
Align USB nodes with the latest dt-bindings. It is adding resets, new interrupt and also some quirks. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-06-23arm64: zynqmp: Remove unused property from SD/USBMichal Simek1-8/+0
Linux kernel is not using these properties that's why they can be removed. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-06-23arm64: zynqmp: rtc: Update rtc calibration valueSrinivas Neeli1-1/+1
As per the design specification "The 16-bit Seconds Calibration Value represents the number of Oscillator Ticks that are required to measure the largest time period that is less than or equal to 1 second. For an oscillator that is 32.768 KHz, this value will be 0x7FFF." Signed-off-by: Srinivas Neeli <srinivas.neeli@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-06-23arm64: zynqmp: Update Copyright years to 2021Michal Simek1-1/+1
Trivial change for all files I have touched recently. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-06-23arm64: zynqmp: Add label for zynqmp_ipiMichal Simek1-1/+1
Add label which is used by bootloader for adding bootloader specific flag. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Link: https://lore.kernel.org/r/3dc8416abdd3498e61edcd83830a12af295c5c6d.1611224800.git.michal.simek@xilinx.com
2021-06-23arm64: zynqmp: Add reset description for sataMichal Simek1-0/+1
Sata needs to get reset before configuration that's why add property for it there. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-06-23arm64: zynqmp: Add missing SMID for pcie to zynqmp.dtsiStefano Stabellini1-0/+2
The SMMU is disabled in device tree so this change has no impact. The benefit is that this way it is in sync with xen.dtsi. Xen enables the SMMU and makes use of it. Signed-off-by: Stefano Stabellini <stefano.stabellini@xilinx.com>
2021-06-23arm64: zynqmp: Disable CCI by defaultMichal Simek1-0/+1
There is no reason to have CCI no enabled by default. Enable it when your system configuration requires it. In Xilinx configuration flow this is work for Device Tree Generator which reads information from HW Design configuration. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-03-30xilinx: Sync DTs with Linux kernelMichal Simek1-117/+37
There are several changes which happen in mainline kernel which should get also to U-Boot. Here is the list of patches from the kernel: - ARM: zynq: Fix leds subnode name for zc702/zybo-z7 - arm64: dts: zynqmp: Fix leds subnode name for zcu100/ultra96 v1 - arm64: dts: zynqmp: Fix u48 si5382 chip on zcu111 - arm64: dts: zynqmp: Wire up the DisplayPort subsystem - arm64: dts: zynqmp: Add DisplayPort subsystem - arm64: dts: zynqmp: Add DPDMA node - arm64: dts: zynqmp: Enable phy driver for Sata on zcu102/zcu104/zcu106 - arm64: dts: zynqmp: Enable si5341 driver for zcu102/106/111 - arm64: dts: zynqmp: Add DT description for si5328 for zcu102/zcu106 - arm64: dts: zynqmp-zcu100-revC: correct interrupt flags - arm64: dts: xilinx: align GPIO hog names with dtschema - arm64: zynqmp: Add Xilinx AES node - dt: bindings: dma: xilinx: dpdma: DT bindings for Xilinx DPDMA but also some other changes have been done. - Using only one compatible string for adxl345 on zturn - Remove Xilinx internal DP bindings - Remove USB3.0 serdes configurations - Remove SATA serdes configuration for zc1232 - Resort nvmem_firmware - Update nand compatible string - Aling power-domains property for sd0/1 Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-03-30arm64: zynqmp: Rename clocks as per the Arasan NAND driverAmit Kumar Mahapatra1-1/+1
In zynqmp.dtsi file renamed "clk_sys" clock to "controller" and "clk_flash" clock to "bus" as per upstreamed Arasan NAND driver. This fixes NAND driver probe failure. Signed-off-by: Amit Kumar Mahapatra <amit.kumar-mahapatra@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-01-04arm64: zynqmp: Sync DT with Linux kernelMichal Simek1-33/+28
All changes are recorded in lore.kernel.org. Here are links to that patches for the record. Link: https://lore.kernel.org/r/f59a63d8cb941592de6d2dee8afa6f120b2e40c8.1601379794.git.michal.simek@xilinx.com Link: https://lore.kernel.org/r/68f20a2b2bb0feee80bc3348619c2ee98aa69963.1598263539.git.michal.simek@xilinx.com Link: https://lore.kernel.org/r/f767fe007e446a2299fda9905e75b723c650a424.1605021644.git.michal.simek@xilinx.com Link: https://lore.kernel.org/r/cc294ae1a79ef845af6809ddb4049f0c0f5bb87a.1598259551.git.michal.simek@xilinx.com Link: https://lore.kernel.org/r/20200629081744.13916-1-krzk@kernel.org And there are other minor changes (just moving things around). Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-04-06arm64: zynqmp: Move pinctrl node under firmware nodeMichal Simek1-6/+5
Pinctrl is handled via firmare interface that's why move it there without reg property and new compatible string. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-04-06arm64: zynqmp: Fix GIC compatible propertyMichal Simek1-1/+1
dtbs_check is showing warning around GIC compatible property as interrupt-controller@f9010000: compatible: ['arm,gic-400', 'arm,cortex-a15-gic'] is not valid under any of the given schemas Similar change has been done also by Linux kernel commit 5400cdc1410b ("ARM: dts: sunxi: Fix GIC compatible") Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-04-06arm64: zynqmp: Sync DP subsystemMichal Simek1-79/+57
Sync DP subsystem with the latest state in Xilinx U-Boot repository. This binding hasn't been approved in mainline Linux but it is much better than ancient version which this patch removes. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-04-06arm64: dts: zynqmp: Add clk cells for sdhciAshok Reddy Soma1-0/+4
Add clock-cells and clock-output-names for sdhci0 and sdhci1. These are needed for linux sdhci driver from 5.4 version onwards. Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-04-06arm64: zynqmp: Remove second copy of reset-controllerMichal Simek1-5/+0
Reset controller is handled via firmware that's why it should be the part of firmware node. Origin solution hasn't been removed when above change was applied by commit b07e97b4ba27 ("arm64: zynqmp: Use reset header in zynqmp.dtsi"). Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-04-06arm64: zynqmp: Sync zynqmp fpga manager with mainlineNava kishore Manne1-5/+7
Sync zynqmp fpga manager with mainline. Signed-off-by: Nava kishore Manne <nava.manne@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-04-06arm64: zynqmp: Update Copyright years to 2020Michal Simek1-1/+1
Trivial change. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-01-14arm64: zynqmp: Sync gpio-controller name locationMichal Simek1-1/+1
Sync location with mainline kernel. Added by Linux kernel commit 75926f07baae ("arm64: dts: zynqmp: Add missing gpio-controller to ps gpio"). Fixes: 0b33e0b15600 ("arm64: zynqmp: Add missing gpio property to dtsi") Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-01-14arm64: dts: zynqmp: Fix node names which contain "_"Michal Simek1-2/+2
s/_/-/ for node names. It fixes warnings like this: ... Warning (node_name_chars_strict): /cpu_opp_table: Character '_' not recommended in node name ... Issues reported by make dtbs W=12 Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-01-14arm64: dts: Remove inconsistent use of 'arm,armv8' compatible stringRob Herring1-4/+4
The 'arm,armv8' compatible string is only for software models. It adds little value otherwise and is inconsistently used as a fallback on some platforms. Remove it from those platforms. This fixes warnings generated by the DT schema. Reported-by: Michal Simek <michal.simek@xilinx.com> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Will Deacon <will.deacon@arm.com> Acked-by: Antoine Tenart <antoine.tenart@bootlin.com> Acked-by: Nishanth Menon <nm@ti.com> Acked-by: Maxime Ripard <maxime.ripard@bootlin.com> Acked-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Acked-by: Chanho Min <chanho.min@lge.com> Acked-by: Krzysztof Kozlowski <krzk@kernel.org> Acked-by: Masahiro Yamada <yamada.masahiro@socionext.com> Acked-by: Gregory CLEMENT <gregory.clement@bootlin.com> Acked-by: Thierry Reding <treding@nvidia.com> Acked-by: Heiko Stuebner <heiko@sntech.de> Acked-by: Simon Horman <horms+renesas@verge.net.au> Acked-by: Tero Kristo <t-kristo@ti.com> Acked-by: Wei Xu <xuwei5@hisilicon.com> Acked-by: Liviu Dudau <liviu.dudau@arm.com> Acked-by: Matthias Brugger <matthias.bgg@gmail.com> Acked-by: Michal Simek <michal.simek@xilinx.com> Acked-by: Scott Branden <scott.branden@broadcom.com> Acked-by: Kevin Hilman <khilman@baylibre.com> Acked-by: Chunyan Zhang <zhang.lyra@gmail.com> Acked-by: Robert Richter <rrichter@cavium.com> Acked-by: Jisheng Zhang <Jisheng.Zhang@synaptics.com> Acked-by: Dinh Nguyen <dinguyen@kernel.org> Signed-off-by: Rob Herring <robh@kernel.org> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2019-10-24arm64: zynqmp: List lpd watchdog in dtsiMichal Simek1-0/+9
There are use cases where lpd watchdog can be configured for APU use. By design this IP should be listed in zynqmp.dtsi to make sure that node is properly enabled by DTG. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-10-24arm64: zynqmp: Use power header in zynqmp.dtsiMichal Simek1-0/+44
Use power header and add power-domains property. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-10-24arm64: zynqmp: Use reset header in zynqmp.dtsiMichal Simek1-4/+19
Wire reset-controller and use macros from reset header. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-10-24arm64: zynqmp: Use backward compatible string for gemMichal Simek1-4/+4
Add backward compatible string for gem ("cdns,gem"). Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-10-24arm64: zynqmp: Switch to xlnx-zynqmp-clk headerMichal Simek1-1/+1
Use prepared header instead of hardcoded values. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-10-24arm64: zynqmp: Update nand device tree node propertiesNaga Sureshkumar Relli1-2/+2
This patch updates the nand device tree node properties as per updated driver. Signed-off-by: Naga Sureshkumar Relli <naga.sureshkumar.relli@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-10-24arm64: zynqmp: Fix DT style for ipi mailboxMichal Simek1-1/+1
Remove additional empty space. Fixes: 95497afada58 ("arm64: zynqmp: add firmware and mailbox node to DT") Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-10-08arm64: zynqmp: add firmware and mailbox node to DTIbai Erkiaga1-5/+39
The following patch adds a mailbox node and firmware node to following the mainline DT. Signed-off-by: Ibai Erkiaga <ibai.erkiaga-elorza@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-02-15arm64: dts: Fix various entry-method properties to reflect documentationAmit Kucheria1-1/+1
The idle-states binding documentation[1] mentions that the 'entry-method' property is required on 64-bit platforms and must be set to "psci". Linux commit a13f18f59d26 ("Documentation: arm: Fix typo in the idle-states bindings examples") attempted to fix this earlier but clearly more is needed. Linux docs: Documentation/devicetree/bindings/arm/idle-states.txt (see idle-states node) Signed-off-by: Amit Kucheria <amit.kucheria@linaro.org> Acked-by: Sudeep Holla <sudeep.holla@arm.com> Acked-by: Li Yang <leoyang.li@nxp.com> Signed-off-by: Olof Johansson <olof@lixom.net> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-02-15arm64: zynqmp: Add reset-on-timeout for all boards and modify default ↵Mounika Grace Akula1-1/+2
timeout value This patch adds reset-on-timeout to FPD WDT which will trigger an interrupt to PMU when watchdog expiry happens and PMU takes the necessary action. If this property is not enabled, reason will not be known when watchdog expiry happens. This patch also modifies the default timeout to 60 seconds. Reason is that if u-boot enables WDT, it will set the timeout to 10 seconds and this is not enough to boot till Linux and start the WDT application in Linux. 60 seconds is the maximum safest value to boot till Linux and start the WDT application. Users need to change this timeout value to fit their needs. Signed-off-by: Mounika Grace Akula <mounika.grace.akula@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-01-24arm64: zynqmp: Fix mmc node names to be in sync with kernelSiva Durga Prasad Paladugu1-2/+2
This patches renames sd nodes in dts to be in line with kernel. This patch also modifies the references for the same in code. It checks mmc first to have no time penalty for new DT node names based on left-to-right expression evaluation. Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-04-09arm64: zynqmp: Remove power domain descriptionMichal Simek1-194/+0
This part hasn't been pushed to mainline yet that's why remove it. The patch can be reverted in future when this is pushed there. Reported-by: Alexander Graf <agraf@suse.de> Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Alexander Graf <agraf@suse.de>
2018-04-09arm64: zynqmp: Sync up license with mainline kernelMichal Simek1-1/+5
Mainline Linux kernel has adopted SPDX header license in a different format then was used before. This patch is syncing it up. Also update years in License text and remove Nathalie's email because it is no longer valid. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-04-09arm64: zynqmp: Sync alignment with mainlineMichal Simek1-9/+10
Sync pcie and lpd_dma nodes with mainline version. Incorrect locations are causing diff in statistics that's why synchronizations are needed. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2017-12-14arm64: zynqmp: Add support for generic QSPI bootMichal Simek1-0/+1
This patch is enabling support for SPL QSPI boot. First of all it is necessary to generate atf-spi.ub which is different format than atf-uboot.ub (this can be made as legacy image too) ADDR=`arm-xilinx-linux-gnueabi-readelf -a bl31.elf | grep "Entry point address" | cut -d ':' -f 2 | sed -e 's/^[ \t]*//'` aarch64-linux-gnu-objcopy -O binary bl31.elf bl31.bin ./tools/mkimage -f auto -A arm64 -T firmware -C none -O u-boot -a $ADDR -e $ADDR -n "atf1" -E -b arch/arm/dts/zynqmp-zcu102.dtb -d bl31.bin atf-uboot.ub ./tools/mkimage -A arm64 -T firmware -C none -O u-boot -a $ADDR -e $ADDR -n "atf-for-qspi" -E -d bl31.bin atf-spi.ub This patch is using this QSPI layout with offsets: 0 boot.bin 512k atf-ub 640k u-boot.bin 1280k u-boot.img Which corresponding by writing these images(read from MMC) mmcinfo sf probe load mmc 0 10000000 boot.bin sf erase 0 +$filesize sf write 10000000 0 $filesize load mmc 0 10000000 atf-spi.ub sf erase 0x80000 +$filesize sf write 10000000 0x80000 $filesize load mmc 0 10000000 u-boot.bin sf erase 0xa0000 +$filesize sf write 10000000 0xa0000 $filesize load mmc 0 10000000 u-boot.img sf erase 0x140000 +$filesize sf write 10000000 0x140000 $filesize For testing u-boot running in EL3 you can break atf-spi.ub like this: sf probe sf erase 0x80000 +4 Then u-boot.img is executed. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2017-12-14arm64: zynqmp: Add reference to pmu firmware nodeMichal Simek1-1/+1
This reference is needed for pinctrl driver where some signals can be routed directly to platform management unit (PMU). Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2017-11-28arm64: zynqmp: usb: Correct IOMMU node for making SMMU work with USBAnurag Kumar Vulisha1-4/+4
This patch makes SMMU work by moving the iommus node under the dwc3 child entry from parent node. Signed-off-by: Anurag Kumar Vulisha <anuragku@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2017-11-28arm64: zynqmp: Remove clock setting from dtsiMichal Simek1-2/+0
clock setting is handled via clk dtsi file. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2017-11-28arm64: zynqmp: Uncomment snps,quirk-frame-length-adjustment flag in dwc3Anurag Kumar Vulisha1-2/+2
This patch uncomments snps,quirk-frame-length-adjustment which has the value to adjust the SOF/ITP generated from the controller. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2017-11-28arm64: zynqmp: Add USB OTG interrupts support in dtManish Narani1-2/+2
This patch adds OTG interrupt support in device tree. It will add an extra interrupt line number dedicated to OTG events. This will enable OTG interrupts to serve in DWC3 OTG driver. Signed-off-by: Manish Narani <mnarani@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2017-11-28arm64: zynqmp: Enabled CCI support for USBManish Narani1-2/+6
This patch adds CCI support for USB when CCI is enabled in design. This patch also adds 'reg' property for Xilinx USB 3.0 IP. The 'reg' property is added in order to modify a register in that to enable coherency in Hardware. Also add address to unit name to avoid dtc warning Signed-off-by: Manish Narani <mnarani@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2017-11-28arm64: zynqmp: Add support reading SoC revision using nvmem driver in dwc3Anurag Kumar Vulisha1-0/+4
This patch adds support for reading silicon revision using zynqmp nvmem driver. Signed-off-by: Anurag Kumar Vulisha <anuragku@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2017-11-28arm64: zynqmp: Move nodes which have no reg property out of busMichal Simek1-48/+48
Nodes without reg properties shouldn't be placed in amba node. Move them out. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2017-11-28arm64: zynqmp: dt: Add AMS nodeMichal Simek1-0/+26
The AMS includes an ADC as well as on-chip sensors that can be used to sample external voltages and monitor on-die operating conditions, such as temperature and supply voltage levels. Signed-off-by: Rajnikant Bhojani <rajnikant.bhojani@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2017-11-28arm64: zynqmp: sdhci: set host quirk2 for no 1.8V support for 1.0 siliconManish Narani1-0/+4
This patch sets host quirk2 bit field for No 1.8V supported in case of 1.0 silicon. The 1.0 silicon doesn't have support for UHS-I modes. This property will ensure the SD runs on High Speed mode. Signed-off-by: Manish Narani <mnarani@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2017-11-28arm64: zynqmp: Use reset controller framework for asserting/de-asserting resetAnurag Kumar Vulisha1-2/+1
This patch modifies the phy_zynqmp.c driver to use reset-controller framework for asserting/de-asserting reset for High Speed modules. Also fix documentation and dtsi. Signed-off-by: Anurag Kumar Vulisha <anuragku@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2017-11-28arm64: zynqmp: Add reset-controller support in serdes driverAnurag Kumar Vulisha1-0/+13
This patch add the reset nodes in zynqmp.dtsi which are used by reset-controller framework Signed-off-by: Anurag Kumar Vulisha <anuragku@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2017-11-28arm64: zynqmp: Remove tx_termination_fix detection on silicon v1Michal Simek1-1/+2
Only silicon v1 requires this termination fix. With new nvmem soc revision nvmem detection driver this can be autodetected at run time and this flag is not needed. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2017-11-28arm64: zynqmp: Add support for zynqmp nvmem firmware driverNava kishore Manne1-0/+10
Add support for zynqmp nvmem firmware driver. Signed-off-by: Nava kishore Manne <navam@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
generated by cgit v1.2.3 (git 2.39.0) at 2024-09-17 02:58:00 +0300