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path: root/arch/arm/include/asm/arch-omap5
AgeCommit message (Expand)AuthorFilesLines
2016-09-06TI: Rework SRAM definitions and maximumsTom Rini1-1/+5
2016-07-26omap5/dra7: i2c: correct register offset for sync registerMugunthan V N1-3/+3
2016-06-03arm: omap: Introduce vcores_init functionKeerthy1-0/+1
2016-06-03ARM: DRA7: Add macros for voltage values for all OPPsAnna, Suman1-6/+23
2016-06-03ARM: DRA7: Consolidate voltage macros across different SoCsAnna, Suman1-13/+6
2016-06-03ARM: DRA7: Define common macros for efuse register offsetsAnna, Suman1-0/+7
2016-06-03ARM: DRA7: Update/Correct MPU and CORE OPP_NOM voltage valuesAnna, Suman1-4/+4
2016-05-24ARM: omap5: add platform specific ethernet phy modes configurationsMugunthan V N1-0/+12
2016-04-25ARM: DRA7: Add ABB setup for all domainsNishanth Menon1-0/+3
2016-04-25ARM: OMAP5: Enable ABB configuration for MM voltage domainNishanth Menon1-0/+1
2016-03-27ARM: OMAP5/DRA7: Expose do_set_iodelayNishanth Menon1-0/+2
2016-03-27ARM: OMAP5/DRA7: Split iodelay functionality into sub stepsNishanth Menon1-0/+2
2016-03-27ARM: DRA72x: Add support for detection of SR2.0Ravi Babu1-0/+1
2016-03-15omap-common: Rename set_muxconf_regs_essential to set_muxconf_regsPaul Kocialkowski1-1/+1
2016-03-15ARM: OMAP4/5: Add generic board detection hookKipisz, Steven1-0/+1
2016-03-15ARM: OMAP4/5: Centralize gpi2c_initKipisz, Steven1-1/+0
2016-03-15ARM: OMAP4/5: Centralize early clock initializationKipisz, Steven1-1/+1
2015-09-12bitops: introduce BIT() definitionHeiko Schocher1-2/+0
2015-08-28board: ti: OMAP5: added USB initializtion codeKishon Vijay Abraham I1-0/+6
2015-08-28board: ti: beagle_x15: added USB initializtion codeKishon Vijay Abraham I1-1/+1
2015-08-28ARM: DRA7: Enable clocks for USB OTGSS2 and USB PHY2Kishon Vijay Abraham I1-0/+3
2015-08-28ARM: DRA74-evm: Use SMA_1 spare register to workaround DP83865 phy on SR2.0Nishanth Menon2-0/+6
2015-08-28ARM: DRA7: Add detection of ES2.0Nishanth Menon1-0/+1
2015-08-17ARM: dra7xx_evm: Enable EDMA3 in SPL to support DMA on qspiVignesh R1-0/+5
2015-08-13ARM: DRA7/ OMAP5: implement Auxiliary Control Register configurationNishanth Menon1-0/+1
2015-07-27omap: SPL boot devices cleanup and completionPaul Kocialkowski1-10/+13
2015-07-27omap-common: Common boot code OMAP3 support and cleanupPaul Kocialkowski1-0/+12
2015-06-12ARM: DRA7: CPSW: Remove IO delay hackLokesh Vutla1-25/+0
2015-06-12ARM: DRA7: Add support for manual mode configurationLokesh Vutla3-1/+40
2015-06-12ARM: DRA7: Add support for IO delay configurationLokesh Vutla1-0/+58
2015-06-12ARM: DRA7: Add support for virtual mode configurationLokesh Vutla1-0/+20
2015-06-12ARM: DRA7: Add pinctrl register definitionsLokesh Vutla1-0/+15
2015-06-12ARM: DRA7: Make do_set_mux32() genericLokesh Vutla1-0/+1
2015-04-14board: ti: DRA7: added USB initializtion codeKishon Vijay Abraham I1-0/+12
2015-03-13ARM: DRA7 / OMAP5: Add workaround for ARM errata 798870Praveen Rao1-0/+3
2015-01-29ARM: OMAP5: DRA7xx: Add support for power rail groupingLubomir Popov1-3/+17
2014-12-04arm: omap: add support for am57xx devicesFelipe Balbi2-3/+3
2014-12-04arm: omap5: tps659038: rename regulator definesFelipe Balbi1-5/+5
2014-08-25board/ti/dra7xx: add support for parallel NORpekon gupta1-6/+6
2014-05-24armv7:TI: Add <asm/ti-common/sys_proto.h> and migrate omap_hw_init_contextTom Rini2-54/+1
2014-05-24ARM: DRA72x: Add Silicon ID supportLokesh Vutla1-0/+1
2014-05-24ARM: omap5: add platform specific info for GPMC and ELM controllerspekon gupta4-6/+90
2014-05-14ARM: OMAP5: add CKO buffer control maskDmitry Lifshitz1-0/+3
2014-05-14ARM: OMAP5: add UART4 supportDmitry Lifshitz1-0/+1
2014-04-17ARM: OMAP: hide custom bit manipulation function sr32()Wolfgang Denk1-1/+0
2014-03-28spl: Fix guardian macros in spl.hMarek Vasut1-1/+1
2014-03-05mtd: nand: omap: move omap_gpmc.h from arch/arm/include/asm to drivers/mtd/nandpekon gupta1-1/+1
2014-03-05mtd: nand: omap: merge duplicate GPMC data from different arch-xx headers int...pekon gupta2-45/+1
2014-02-19ARM: O5/dra7xx: Add SATA boot supportDan Murphy2-9/+1
2014-01-24DRA7: add ABB setup for MPU voltage domainNishanth Menon1-0/+2
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