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starfive-tech/u-boot.git
Fedora_JH7100_2021.04
Fedora_JH7100_2021.07
Fedora_JH7100_upstream
Fedora_JH7100_upstream_devel
JH7100_Multimedia_V0.1.0
JH7100_VisionFive_OH_dev
JH7100_VisionFive_devel
JH7100_starlight_multimedia
JH7100_upstream
JH7100_upstream_devel
JH7110_VisionFive2_devel
JH7110_VisionFive2_devel-v3.9.3
dubhe_fpga_dev_v2023.10
master
rtthread_AMP
visionfive_devel
StarFive Tech U-Boot for VisionFive (JH7110) boards (mirror)
Andrey V.Kosteltsev
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path:
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arch
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arm
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mach-sunxi
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clock_sun6i.c
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Commit message (
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Author
Files
Lines
2020-05-19
common: Drop linux/delay.h from common header
Simon Glass
1
-0
/
+1
2019-10-25
sunxi: Fix pll1 clock calculation
Stefan Mavrodiev
1
-1
/
+1
2018-11-13
sunxi: use 6MHz PLL_VIDEO step for DE2 for higher resolution LCD
Icenowy Zheng
1
-0
/
+4
2018-05-07
SPDX: Convert all of our single license tags to Linux Kernel style
Tom Rini
1
-2
/
+1
2017-08-11
sunxi: switch PRCM to non-secure on H3/H5 SoCs
Icenowy Zheng
1
-0
/
+6
2017-05-02
sunxi: add clock configuration of R40 sata
Icenowy Zheng
1
-0
/
+7
2017-04-20
sunxi: Add clock support for DE2/HDMI/TCON on newer SoCs
Jernej Skrabec
1
-1
/
+39
2017-04-20
sunxi: Use H3/A64 DRAM initialization code for R40
Chen-Yu Tsai
1
-1
/
+3
2017-04-20
sunxi: Set PLL lock enable bits for R40
Chen-Yu Tsai
1
-0
/
+5
2017-04-05
sunxi: prepare for sharing MACH_SUN8I_H3 config symbol
Andre Przywara
1
-3
/
+3
2017-01-04
sunxi: A64: use H3 DRAM initialization code for A64 as well
Jens Kuske
1
-1
/
+1
2017-01-04
sunxi: clocks: Use the correct pattern register for PLL11
Philipp Tomsich
1
-1
/
+1
2017-01-04
sun6i: Restrict some register initialization to Allwinner A31 SoC
Andre Przywara
1
-1
/
+5
2016-08-26
sunxi: Tune H3 DRAM PLL to improve lock time
Jens Kuske
1
-0
/
+6
2016-04-01
sunxi: Move cpu independent code to mach directory
Alexander Graf
1
-0
/
+274