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path: root/arch/powerpc/cpu/mpc85xx/start.S
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2018-05-07SPDX: Convert all of our single license tags to Linux Kernel styleTom Rini1-2/+1
2017-07-27powerpc: spl: configure SYS_MALLOC_F_LEN independently for SPL and full U-BootAndy Yan1-6/+5
2017-07-23powerpc: move get_pvr() and get_svr() into CChristophe Leroy1-10/+0
2017-04-17powerpc: e6500: Lock/unlock 1 cache instead of L1 as init_ramRuchika Gupta1-2/+4
2017-02-01powerpc: mpc85xx: Use symbolic names for cache control bitsMark Marshall1-4/+4
2016-11-24powerpc: QEMU_E500: Remove macro CONFIG_QEMU_E500York Sun1-1/+1
2016-11-24powerpc: MPC8569: Remove macro CONFIG_MPC8569York Sun1-2/+2
2016-07-21powerpc/mpc85xx: T104x: Add nand secure boot targetSumit Garg1-3/+9
2016-05-24powerpc/mpc85xx: set L2PE in L2CSR0 before enabling L2 cacheAneesh Bansal1-0/+23
2016-04-09powerpc: mpc85xx: Enable pre-relocation malloc for MPC85xxmario.six@gdsys.cc1-0/+30
2015-09-02powerpc: e6500: Lock/unlock L2 cache instead of L1 as init_ramYork Sun1-1/+9
2015-07-31powerpc/mpc85xx: SECURE BOOT- NAND secure boot target for P3041Aneesh Bansal1-0/+11
2015-05-04powerpc/mpc85xx: Use GOT when loading IVORs post-relocationScott Wood1-15/+20
2015-04-20powerpc/mpc85xx: Remove some dead codeScott Wood1-137/+1
2015-04-20powerpc/mpc85xx: Don't relocate exception vectorsScott Wood1-121/+57
2014-05-13powerpc/mpc85xx: Fix boot_flag for calling board_init_f()York Sun1-1/+1
2014-05-13PPC 85xx QEMU: Don't use HID1Alexander Graf1-1/+1
2014-04-23powerpc:Add support of SPL non-relocationPrabhakar Kushwaha1-0/+2
2014-04-23powerpc/mpc85xx: Move LAW_EN define outside of configPrabhakar Kushwaha1-1/+2
2014-04-23powerpc/mpc85xx: SECURE BOOT- Add secure boot target for B4860QDSAneesh Bansal1-1/+2
2014-04-23powerpc/mpc85xx: SECURE BOOT- Add secure boot target for BSC9132QDSAneesh Bansal1-7/+2
2014-04-23PPC 85xx: Add qemu-ppce500 machineAlexander Graf1-0/+11
2014-04-23PPC: 85xx: Remove IVOR resetAlexander Graf1-6/+0
2014-01-25Remove obsolete _LINUX_CONFIG_H macroMasahiro Yamada1-2/+0
2013-12-05powerpc/corenet: CPC1 speculation disableDave Liu1-0/+4
2013-10-17powerpc/mpc85xx:Make L2 cache type independent of CHASSIS2Prabhakar Kushwaha1-1/+1
2013-10-15Coding Style cleanup: remove trailing white spaceWolfgang Denk1-1/+1
2013-09-11powerpc/mpc85xx: Add workaround for erratum A-005125York Sun1-0/+8
2013-08-09powerpc/srio-pcie-boot: Avoid the NOR_BOOT macro when boot from SRIO/PCIELiu Gang1-1/+2
2013-07-24Add GPL-2.0+ SPDX-License-Identifier to source filesWolfgang Denk1-17/+1
2013-06-21powerpc/mpc85xx: modify the functionality clear_bss and aligning the end addr...Ying Zhang1-1/+1
2013-05-25powerpc/mpc85xx: Clear L1 D-cache lockYork Sun1-0/+1
2013-05-25Add e6500 L2 replacement policy selectionJames Yang1-0/+1
2013-05-25Enable L2 cache parity/ECC error checkingJames Yang1-1/+1
2013-05-15e6500: Move L1 enablement after L2 enablementAndy Fleming1-47/+47
2013-05-15powerpc/mpc85xx: Add definitions for HDBCR registersAndy Fleming1-4/+4
2013-03-16Replace __bss_end__ with __bss_endSimon Glass1-2/+2
2013-01-30powerpc/mpc85xx: add support for MMUv2 page sizesScott Wood1-1/+1
2012-11-27spl/powerpc: introduce CONFIG_SPL_INIT_MINIMALScott Wood1-13/+20
2012-11-27powerpc/mpc85xx: fix TLB alignmentScott Wood1-4/+4
2012-11-27powerpc/mpc85xx: move debug tlb entry after TLB is in known stateScott Wood1-44/+40
2012-10-22powerpc/mpc85xx: Enable L2 at the beginning of U-boot for E6500York Sun1-1/+36
2012-10-22powerpc/mpc85xx: Introduce new macros to add and delete TLB entriesYork Sun1-179/+130
2012-08-23powerpc/85xx: clear out TLB on bootScott Wood1-33/+43
2012-08-23powerpc/fsl-corenet: work around erratum A004510Scott Wood1-0/+284
2012-08-23mpc85xx: Initial SP alignment is wrong.Joakim Tjernlund1-11/+5
2012-07-07powerpc/85xx:Fix NAND code base to support debuggerPrabhakar Kushwaha1-1/+1
2012-07-07powerpc/85xx:Make debug exception vector accessiblePrabhakar Kushwaha1-5/+78
2012-07-07powerpc/85xx:Fix MSR[DE] bit in MSR to support debuggerPrabhakar Kushwaha1-2/+5
2012-04-25powerpc/85xx: don't touch MAS7 on e500v1 when relocating CCSRTimur Tabi1-2/+6
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