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StarFive Tech U-Boot for VisionFive (JH7110) boards (mirror)
Andrey V.Kosteltsev
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path:
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arch
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riscv
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dts
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ae350_64.dts
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Author
Files
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2023-02-17
riscv: ae350: dts: Update L2 cache compatible string
Yu Chien Peter Lin
1
-1
/
+1
2022-11-03
riscv: Rename Andes PLIC to PLICSW
Yu Chien Peter Lin
1
-3
/
+3
2021-06-17
riscv: ae350: dts: Add missing "u-boot, dm-spl" for SPL config
Bin Meng
1
-0
/
+1
2021-06-17
riscv: ae350: dts: Remove the unnecessary #address-cells in plic nodes
Bin Meng
1
-2
/
+0
2021-06-17
riscv: ae350: dts: Remove the unnecessary space in bootargs
Bin Meng
1
-1
/
+1
2021-06-17
riscv: ae350: dts: Add SPDX license header
Bin Meng
1
-0
/
+2
2021-05-19
riscv: ae350: Switch to use binman to generate u-boot.itb
Bin Meng
1
-0
/
+2
2019-12-10
riscv: dts: Add #address-cells and #size-cells in nor node
Rick Chen
1
-1
/
+3
2019-12-10
riscv: dts: Support four cores SMP
Rick Chen
1
-3
/
+54
2019-09-03
riscv: dts: move out AE350 L2 node from cpus node
Rick Chen
1
-6
/
+11
2019-04-12
dts: switch spi-flash to jedec, spi-nor compatible
Neil Armstrong
1
-1
/
+1
2019-04-08
riscv: dts: ae350 support SMP
Rick Chen
1
-22
/
+59
2018-11-26
riscv: dts: Add ae350_32.dts for RV32I
Rick Chen
1
-0
/
+229