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starfive-tech/u-boot.git
Fedora_JH7100_2021.04
Fedora_JH7100_2021.07
Fedora_JH7100_upstream
Fedora_JH7100_upstream_devel
JH7100_Multimedia_V0.1.0
JH7100_VisionFive_OH_dev
JH7100_VisionFive_devel
JH7100_starlight_multimedia
JH7100_upstream
JH7100_upstream_devel
JH7110_VisionFive2_devel
JH7110_VisionFive2_devel-v3.9.3
dubhe_fpga_dev_v2023.10
master
rtthread_AMP
visionfive_devel
StarFive Tech U-Boot for VisionFive (JH7110) boards (mirror)
Andrey V.Kosteltsev
summary
refs
log
tree
commit
diff
log msg
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path:
root
/
arch
/
x86
/
cpu
/
ivybridge
/
cpu.c
Age
Commit message (
Expand
)
Author
Files
Lines
2020-05-19
common: Drop log.h from common header
Simon Glass
1
-0
/
+1
2020-05-19
common: Drop init.h from common header
Simon Glass
1
-0
/
+1
2019-12-03
common: Move checkcpu() out of common.h
Simon Glass
1
-0
/
+1
2019-10-08
x86: pci: Drop the first parameter in pci_x86_r/w_config()
Simon Glass
1
-2
/
+1
2018-05-07
SPDX: Convert all of our single license tags to Linux Kernel style
Tom Rini
1
-2
/
+1
2017-04-05
board_f: x86: Use checkcpu() for CPU init
Simon Glass
1
-4
/
+10
2017-02-06
x86: ivybridge: Add more debugging for failures
Simon Glass
1
-1
/
+3
2016-08-30
x86: Add debugging when cpu_common_init() fails
Simon Glass
1
-1
/
+3
2016-03-17
x86: Move common PCH code into a common place
Simon Glass
1
-0
/
+1
2016-03-17
x86: Move common CPU code to its own place
Simon Glass
1
-74
/
+6
2016-03-17
x86: Create a common header for Intel register access
Simon Glass
1
-0
/
+1
2016-03-17
x86: Move microcode code to a common location
Simon Glass
1
-1
/
+1
2016-03-15
dm: Use uclass_first_device_err() where it is useful
Simon Glass
1
-9
/
+5
2016-01-24
x86: ivybridge: Convert enable_usb_bar() to use DM PCI API
Simon Glass
1
-17
/
+17
2016-01-24
x86: ivybridge: Use the I2C driver to perform SMbus init
Simon Glass
1
-36
/
+3
2016-01-24
x86: ivybridge: Do the SATA init before relocation
Simon Glass
1
-0
/
+3
2016-01-24
x86: ivybridge: Move GPIO init to the LPC init() method
Simon Glass
1
-4
/
+0
2016-01-24
x86: ivybridge: Move graphics init much later
Simon Glass
1
-1
/
+0
2016-01-24
x86: ivybridge: Probe the LPC in CPU init
Simon Glass
1
-3
/
+2
2016-01-24
x86: ivybridge: Move northbridge init into the probe() method
Simon Glass
1
-0
/
+2
2016-01-24
x86: ivybridge: Rename bd82x6x_init()
Simon Glass
1
-0
/
+8
2016-01-24
x86: ivybridge: Move more init to the probe() function
Simon Glass
1
-43
/
+0
2016-01-24
x86: ivybridge: Move lpc_early_init() to probe()
Simon Glass
1
-9
/
+0
2016-01-24
x86: ivybridge: Set up the LPC device using driver model
Simon Glass
1
-1
/
+5
2015-12-09
x86: Remove HAVE_ACPI_RESUME
Bin Meng
1
-9
/
+0
2015-12-01
x86: Convert to use driver model timer
Bin Meng
1
-1
/
+0
2015-10-21
x86: chromebook_link: Enable the debug UART
Simon Glass
1
-0
/
+7
2015-04-30
x86: ivybridge: Use reset_cpu()
Simon Glass
1
-3
/
+2
2015-04-18
x86: chromebook_link: dts: Add PCH and LPC devices
Simon Glass
1
-1
/
+1
2015-04-18
dm: x86: pci: Convert chromebook_link to use driver model for pci
Simon Glass
1
-7
/
+9
2015-04-17
x86: Split up arch_cpu_init()
Simon Glass
1
-0
/
+8
2015-04-17
x86: Add a x86_ prefix to the x86-specific PCI functions
Simon Glass
1
-19
/
+19
2015-01-13
x86: ivybridge: Update microcode early in boot
Simon Glass
1
-1
/
+1
2015-01-13
x86: ivybridge: Drop support for ROM caching
Simon Glass
1
-25
/
+0
2014-12-14
x86: Add post failure codes for bist and car
Bin Meng
1
-0
/
+1
2014-11-21
x86: ivybridge: Add LAPIC support
Simon Glass
1
-0
/
+3
2014-11-21
x86: ivybridge: Add early init for PCH devices
Simon Glass
1
-0
/
+141
2014-11-21
x86: ivybridge: Perform Intel microcode update on boot
Simon Glass
1
-0
/
+5
2014-11-21
x86: ivybridge: Check BIST value on boot
Simon Glass
1
-0
/
+16
2014-11-21
x86: ivybridge: Perform initial CPU setup
Simon Glass
1
-0
/
+130
2014-11-21
x86: ivybridge: Add early LPC init so that serial works
Simon Glass
1
-0
/
+12
2014-11-21
x86: ivybridge: Enable PCI in early init
Simon Glass
1
-0
/
+6
2014-11-21
x86: chromebook_link: Implement CAR support (cache as RAM)
Simon Glass
1
-0
/
+2
2014-11-21
x86: Add chromebook_link board
Simon Glass
1
-0
/
+42