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Fedora_JH7100_2021.04
Fedora_JH7100_2021.07
Fedora_JH7100_upstream
Fedora_JH7100_upstream_devel
JH7100_Multimedia_V0.1.0
JH7100_VisionFive_OH_dev
JH7100_VisionFive_devel
JH7100_starlight_multimedia
JH7100_upstream
JH7100_upstream_devel
JH7110_VisionFive2_devel
JH7110_VisionFive2_devel-v3.9.3
dubhe_fpga_dev_v2023.10
master
rtthread_AMP
visionfive_devel
StarFive Tech U-Boot for VisionFive (JH7110) boards (mirror)
Andrey V.Kosteltsev
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arch
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x86
Age
Commit message (
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Author
Files
Lines
2016-03-22
arm: x86: Drop command-line code when CONFIG_CMDLINE is disabled
Simon Glass
1
-0
/
+4
2016-03-17
x86: Add congatec conga-QA3/E3845-4G (Bay Trail) support
Stefan Roese
3
-0
/
+283
2016-03-17
x86: Add support for the samus chromebook
Simon Glass
2
-0
/
+629
2016-03-17
x86: Support a chained-boot development flow
Simon Glass
1
-0
/
+80
2016-03-17
x86: dts: Drop memory SPD compatible string
Simon Glass
1
-1
/
+0
2016-03-17
x86: ivybridge: Convert to use the common SDRAM code
Simon Glass
1
-311
/
+83
2016-03-17
x86: Add common SDRAM-init code
Simon Glass
3
-0
/
+327
2016-03-17
x86: Move common PCH code into a common place
Simon Glass
6
-84
/
+99
2016-03-17
x86: Add a function to set the IOAPIC ID
Simon Glass
2
-0
/
+18
2016-03-17
x86: broadwell: Add support for high-speed I/O lane with ME
Simon Glass
2
-0
/
+58
2016-03-17
x86: broadwell: Add support for SDRAM setup
Simon Glass
4
-0
/
+509
2016-03-17
x86: broadwell: Add power-control support
Simon Glass
3
-0
/
+220
2016-03-17
x86: broadwell: Add reference code support
Simon Glass
2
-0
/
+114
2016-03-17
x86: broadwell: Add an LPC driver
Simon Glass
3
-0
/
+110
2016-03-17
x86: broadwell: Add a northbridge driver
Simon Glass
2
-0
/
+60
2016-03-17
x86: broadwell: Add a SATA driver
Simon Glass
2
-0
/
+270
2016-03-17
x86: broadwell: Add a pinctrl driver
Simon Glass
3
-0
/
+370
2016-03-17
x86: broadwell: Add a PCH driver
Simon Glass
4
-0
/
+839
2016-03-17
x86: Add basic support for broadwell
Simon Glass
10
-0
/
+1246
2016-03-17
x86: Add support for running Intel reference code
Simon Glass
2
-0
/
+23
2016-03-17
x86: Drop all the old pin configuration code
Simon Glass
1
-141
/
+0
2016-03-17
x86: Add an ICH6 pin configuration driver
Simon Glass
3
-0
/
+218
2016-03-17
x86: link: Add pin configuration to the device tree
Simon Glass
1
-0
/
+155
2016-03-17
x86: Update microcode for secondary CPUs
Simon Glass
5
-2
/
+12
2016-03-17
x86: ivybridge: Show microcode version for each core
Simon Glass
1
-1
/
+2
2016-03-17
x86: Record the CPU details when starting each core
Simon Glass
3
-1
/
+20
2016-03-17
x86: Move common MRC Kconfig options to the common file
Simon Glass
2
-26
/
+62
2016-03-17
x86: Allow I/O functions to use pointers
Simon Glass
1
-2
/
+10
2016-03-17
x86: Add macros to clear and set I/O bits
Simon Glass
1
-0
/
+22
2016-03-17
x86: ivybridge: Drop sandybridge_early_init()
Simon Glass
1
-2
/
+0
2016-03-17
x86: Move Intel Management Engine code to a common place
Simon Glass
10
-369
/
+418
2016-03-17
x86: Rename PORT_RESET to IO_PORT_RESET
Simon Glass
3
-5
/
+5
2016-03-17
x86: Move common CPU code to its own place
Simon Glass
6
-76
/
+162
2016-03-17
x86: Move common LPC code to its own place
Simon Glass
6
-85
/
+166
2016-03-17
x86: Add the root-complex block to common intel registers
Simon Glass
4
-7
/
+9
2016-03-17
x86: Create a common header for Intel register access
Simon Glass
6
-6
/
+22
2016-03-17
x86: Move microcode code to a common location
Simon Glass
6
-4
/
+8
2016-03-17
x86: Move cache-as-RAM code into a common location
Simon Glass
4
-1
/
+8
2016-03-17
x86: cpu: Add functions to return the family and stepping
Simon Glass
2
-0
/
+24
2016-03-17
x86: broadwell: Add a few microcode files
Simon Glass
2
-0
/
+2272
2016-03-17
x86: Add comments to the SIPI vector
Simon Glass
2
-0
/
+2
2016-03-17
x86: Tidy up mp_init to reduce duplication
Simon Glass
1
-53
/
+26
2016-03-17
x86: Correct duplicate POST values
Simon Glass
1
-2
/
+2
2016-03-17
x86: gpio: Correct GPIO setup ordering
Simon Glass
1
-0
/
+5
2016-03-17
x86: dts: link: Add board ID GPIOs
Simon Glass
1
-0
/
+2
2016-03-17
x86: dts: link: Move SPD info into the memory controller
Simon Glass
1
-111
/
+110
2016-03-17
x86: link: Add required GPIO properties
Simon Glass
1
-3
/
+9
2016-03-17
x86: Add some more common MSR indexes
Simon Glass
3
-20
/
+43
2016-03-17
x86: cpu: Make the vendor table const
Simon Glass
1
-1
/
+1
2016-03-17
x86: Support booting SeaBIOS
Bin Meng
3
-0
/
+28
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