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2021-11-02Merge tag 'u-boot-amlogic-20211102' of ↵Tom Rini1-1/+67
https://source.denx.de/u-boot/custodians/u-boot-amlogic - add sm efuse write support and cmd for read/write efuse - add JetHub D1 eth mac generation with manufacturer OUI
2021-11-01x86: tangier: pinmux: Move error message to the callerAndy Shevchenko1-7/+3
Move error message to the caller of mrfld_pinconfig*() in order to unify them in the future. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2021-11-01x86: tangier: pinmux: Move is_protected assignment closer to its userAndy Shevchenko1-2/+1
Move is_protected assignment closer to its user. This increases readability and makes maintenance easier. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2021-11-01x86: edison: Don't take SD card detect pin into considerationAndy Shevchenko1-0/+17
There are two PCB designs in the wild which use the opposite signaling for SD card detection. This makes U-Boot working in one case and failing in the other. Quirk this out by disconnecting SD card detection pin from the PCB by switching it to mode 3. In the disconnected state the read value is always the same and inverted to what we are expecting in the code. BugLink: https://github.com/edison-fw/meta-intel-edison/issues/136 Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2021-11-01x86: tangier: Enable support for SD/SDIO family in the pinmux driverAndy Shevchenko1-5/+34
We would need to quirk out the Card Detect case and for that we allow configuring the SD/SDIO family of pins. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2021-11-01x86: Fix i8254 ifdef include guardAlistair Delva1-2/+2
When building U-Boot with clang, it notices that the i8254.h include guard does not work correctly due to a typo. Fix it. Signed-off-by: Alistair Delva <adelva@google.com> Cc: Simon Glass <sjg@chromium.org> Cc: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> [bmeng: fixed the other same typo at the end of the same file] Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
2021-11-01x86: chromebook_coral: fix C block commentAlistair Delva1-0/+1
Fix a warning seen when compiling this dts file. Signed-off-by: Alistair Delva <adelva@google.com> Cc: Simon Glass <sjg@chromium.org> Cc: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2021-11-01x86: tangier: Replace Method() by Name() for _STA objectAndy Shevchenko1-64/+17
There is no point to use Method() for the constant. Replace it with Name() defined object. For the _STA case it saves 3 bytes per each entry. Before: 2881 After: 2833 Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2021-10-31Merge tag 'dm-pull-boo21' of https://source.denx.de/u-boot/custodians/u-boot-dmTom Rini3-2/+4
Environment tidy-ups patman 'postfix' support fix binman test race condition causing a timeout error # gpg: Signature made Sun 31 Oct 2021 03:36:55 PM EDT # gpg: using RSA key B25C0022AF86A7CC1655B6277F173A3E9008ADE6 # gpg: issuer "sjg@chromium.org" # gpg: Good signature from "Simon Glass <sjg@chromium.org>" [unknown] # gpg: WARNING: This key is not certified with a trusted signature! # gpg: There is no indication that the signature belongs to the owner. # Primary key fingerprint: B25C 0022 AF86 A7CC 1655 B627 7F17 3A3E 9008 ADE6
2021-10-31bootstage: Add SPL supportMarek Vasut1-1/+1
Allow usage of the bootstage facilities in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
2021-10-31sandbox: Migrate ARCH_MAP_SYSMEM to KconfigTom Rini2-1/+3
Move this from a hard-coded define in config.mk to Kconfig. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2021-10-31Merge https://source.denx.de/u-boot/custodians/u-boot-shTom Rini1-12/+10
- rzg2_beacon updates
2021-10-31board: samsung: add support for Galaxy A series of 2017 (a5y17lte)Dzmitry Sankouski3-0/+60
Samsung Galaxy A3, A5, A7 (2017) - middle class Samsung smartphones. U-boot can be used as chain-loaded bootloader to gain control on booting vanilla linux(and possibly others) kernels Signed-off-by: Dzmitry Sankouski <dsankouski@gmail.com> Cc: Minkyu Kang <mk7.kang@samsung.com>
2021-10-31SoC: exynos: add support for exynos 78x0Dzmitry Sankouski4-0/+648
Samsung Exynos 7880 \ 7870 - SoC for mainstream smartphones and tablets introduced on March 2017. Features: - 8 Cortex A53 cores - ARM Mali-T830 MP3 GPU - LTE Cat. 7 (7880) or 6 (7870) modem Signed-off-by: Dzmitry Sankouski <dsankouski@gmail.com> Cc: Minkyu Kang <mk7.kang@samsung.com>
2021-10-31board: samsung: add Samsung Galaxy S9/S9+(SM-G96x0) boardDzmitry Sankouski4-0/+110
Samsung S9 SM-G9600 - Snapdragon SDM845 version of the phone, for China \ Hong Kong markets. Has unlockable bootloader, unlike SM-G960U (American market version), which allows running u-boot as a chain-loaded bootloader. Signed-off-by: Dzmitry Sankouski <dsankouski@gmail.com> Cc: Ramon Fried <rfried.dev@gmail.com> Cc: Tom Rini <trini@konsulko.com>
2021-10-31SoC: qcom: add support for SDM845Dzmitry Sankouski6-0/+279
Hi-end qualcomm chip, introduced in late 2017. Mostly used in flagship phones and tablets of 2018. Features: - arm64 arch - total of 8 Kryo 385 Gold / Silver cores - Hexagon 685 DSP - Adreno 630 GPU Tested only as second-stage bootloader. Signed-off-by: Dzmitry Sankouski <dsankouski@gmail.com> Cc: Ramon Fried <rfried.dev@gmail.com> Cc: Tom Rini <trini@konsulko.com> Cc: Stephan Gerhold <stephan@gerhold.net>
2021-10-31clocks: qcom: add clocks for SDM845 debug uartDzmitry Sankouski3-1/+95
Allows to change clock frequency of debug uart, thus supporting wide range of baudrates. Enable / disable functionality is not implemented yet. In most use cases of SDM845 (i.e. mobile phones and tablets) it's not needed, because qualcomm first stage bootloader leaves it initialized, and on the other hand there's no possibility to replace signed first stage bootloader with u-boot. Signed-off-by: Dzmitry Sankouski <dsankouski@gmail.com> Cc: Ramon Fried <rfried.dev@gmail.com> Cc: Tom Rini <trini@konsulko.com>
2021-10-31pinctrl: qcom: add pinctrl and gpio drivers for SDM845 SoCDzmitry Sankouski3-0/+48
Signed-off-by: Dzmitry Sankouski <dsankouski@gmail.com> Cc: Ramon Fried <rfried.dev@gmail.com> Cc: Stephan Gerhold <stephan@gerhold.net> [trini: Add CONFIG_SDM845 around sdm845_data usage]
2021-10-31arm: dts: apple: Add preliminary device treesMark Kettenis4-0/+796
Add preliminary device trees for the Apple M1 mini (2020) and Apple M1 Macbook Pro 13" (2020). Device tree bindings for the Apple M1 SoC are still being formalized and these device trees will be synchronized with the Linux kernel as needed. The device trees in this commit are based on the initial Apple M1 device trees from Linux 5.13, nodes for dart, pcie, pinctrl, pmgr, usb based on bindings on track for inclusion in Linux 5.15 and 5.16 and nodes for i2c, mailbox, nvme, pmu, spmi and watchdog that don't have a proposed binding yet. These device trees are provided as a reference only as U-Boot uses the device tree passed by the m1n1 bootloader. Signed-off-by: Mark Kettenis <kettenis@openbsd.org> Reviewed-by: Simon Glass <sjg@chromium.org>
2021-10-31iommu: Add Apple DART driverMark Kettenis1-0/+1
The DART is an IOMMU that is used on Apple's M1 SoC. This driver configures the DART such that it operates in bypass mode which is enough to support DMA for the USB3 ports integrated on the SoC. Signed-off-by: Mark Kettenis <kettenis@openbsd.org> Reviewed-by: Simon Glass <sjg@chromium.org>
2021-10-31serial: s5p: Add Apple M1 supportMark Kettenis2-0/+42
Apple M1 SoCs include an S5L UART which is a variant of the S5P UART. Add support for this variant and enable it by default on Apple SoCs. Signed-off-by: Mark Kettenis <kettenis@openbsd.org> Reviewed-by: Simon Glass <sjg@chromium.org>
2021-10-31arm: apple: Add initial support for Apple's M1 SoCMark Kettenis6-0/+223
Add support for Apple's M1 SoC that is used in "Apple Silicon" Macs. This builds a basic U-Boot that can be used as a payload for the m1n1 boot loader being developed by the Asahi Linux project. Signed-off-by: Mark Kettenis <kettenis@openbsd.org> Reviewed-by: Simon Glass <sjg@chromium.org> [trini: Add MAINTAINERS entry]
2021-10-31test: Add tests for IOMMU uclassMark Kettenis1-0/+6
Add a set of tests for the IOMMU uclass. Signed-off-by: Mark Kettenis <kettenis@openbsd.org> Reviewed-by: Simon Glass <sjg@chromium.org>
2021-10-31arm: mvebu: Fix booting from SATAPali Rohár1-2/+2
Use proper SATA macro for boot_device switch in spl_boot_device() function. Signed-off-by: Pali Rohár <pali@kernel.org> Fixes: 2226ca173486 ("arm: mvebu: Load U-Boot proper binary in SPL code based on kwbimage header")
2021-10-31Revert "arch: arm: use dt and UCLASS_SYSCON to get gic lpi details"Michael Walle4-63/+36
Stop using the device tree as a source for ad-hoc information. This reverts commit 2ae7adc659f7fca9ea65df4318e5bca2b8274310. Signed-off-by: Michael Walle <michael@walle.cc> [trini: Also make board/broadcom/bcmns3/ns3.c fail clearly now] Signed-off-by: Tom Rini <trini@konsulko.com>
2021-10-31Revert "arm64: Layerscape: Survive LPI one-way reset workaround"Tom Rini5-41/+1
Ad-hoc bindings that are not part of the upstream device tree / bindings are not allowed in-tree. Only bindings that are in-progress with upstream and then re-synced once agreed upon are. This reverts commit af288cb291da3abef6be0875527729296f7de7a0. Cc: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Cc: Priyanka Jain <priyanka.jain@nxp.com> Reported-by: Michael Walle <michael@walle.cc> Signed-off-by: Tom Rini <trini@konsulko.com> Acked-by: Marc Zyngier <maz@kernel.org>
2021-10-29ARM: rmobile: beacon: Enable reference clocks for USB and AVBAdam Ford1-0/+2
Both Ethernet and USB drivers get their reference clocks from the versaclock. Enable that driver and the common clock driver by default. Signed-off-by: Adam Ford <aford173@gmail.com>
2021-10-29ARM: rmobile: beacon: Remove duplicated for RZ/G2 M/N/HAdam Ford1-13/+1
Now that TARGET_BEACON_RZG2M can handle all the work that was done with TARGET_BEACON_RZG2N and TARGET_BEACON_RZG2H, remove them since they just create more duplicate code. Signed-off-by: Adam Ford <aford173@gmail.com>
2021-10-29ARM: rmobile: beacon: Support RZ/G2 [M/N/H] on TARGET_BEACON_RZG2MAdam Ford1-0/+8
The three different boards share the same board file and only differ in terms of which SoC is being used. By enabling FIT on TARGET_BEACON_RZG2M, it can support all three boards and elimate duplicate code. Signed-off-by: Adam Ford <aford173@gmail.com>
2021-10-29ARM: amlogic: add sm efuse write support and cmd for read/write efuseVyacheslav Bocharov1-1/+67
This adds support for amlogic efuse write and provides two subcommands of "sm" command: "efuseread" and "efusewrite" to read/write bytes between memory and efuse. Signed-off-by: Vyacheslav Bocharov <adeep@lexina.in> [narmstrong: fixed indent at end of patch] Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2021-10-28Merge https://source.denx.de/u-boot/custodians/u-boot-marvellTom Rini3-3/+12
- mvebu: Fix usage of BIN header arguments (Pali) - mvebu: turris_omnia: Fix MTD partitions order for Linux (Pali) - mvebu: nandpagesize support for kwbimage v1 (Pali)
2021-10-28arm: mvebu: Fix comments about kwbimage structuresPali Rohár1-1/+1
kwbimage v1 is used on more SoCs. Signed-off-by: Pali Rohár <pali@kernel.org> Reviewed-by: Stefan Roese <sr@denx.de>
2021-10-28arm: mvebu: Update name of kwbimage v1 field at offset 0x2-0x3Pali Rohár1-1/+1
At this offset is stored nand page size. Signed-off-by: Pali Rohár <pali@kernel.org> Reviewed-by: Stefan Roese <sr@denx.de>
2021-10-28arm: mvebu: Remove dummy BIN header arguments for SPL binaryPali Rohár1-1/+1
U-Boot SPL binary does not read BIN header arguments, so passing some dummy values 0000005b and 00000068 has no effect for U-Boot SPL code. Probably these two values comes from old Marvell DDR training code which was separated from U-Boot and used it for some configuration. Seems that two 32-bit values were specified here to ensure SPL code alignment to 128-bit boundary as it is required e.g. for A370 or AXP processors. Main kwbimage header is 64-byte long which is aligned to 128-bit boundary. Optional kwbheader is 32-bit long, number of BIN header arguments is stored in 32-bit number. So for alignment to 128-bit boundary is needed 64-bit padding which exactly these two 32-bit dummy arguments provided. Now when mkimage correctly aligns start of executable code in BIN header to 128-bit boundary, there is no requirement to put dummy argument values into kwbimage. So remove them. Signed-off-by: Pali Rohár <pali@kernel.org> Reviewed-by: Stefan Roese <sr@denx.de>
2021-10-28arm: mvebu: Add documentation for save_boot_params() functionPali Rohár1-0/+9
Important detail is availability of kwbimage BIN header arguments passed via r0 and r1 registers by BootROM. Signed-off-by: Pali Rohár <pali@kernel.org> Reviewed-by: Stefan Roese <sr@denx.de>
2021-10-27sandbox: Remove OF_HOSTFILEIlias Apalodimas3-19/+19
OF_HOSTFILE is used on sandbox configs only. Although it's pretty unique and not causing any confusions, we are better of having simpler config options for the DTB. So let's replace that with the existing OF_BOARD. U-Boot would then have only three config options for the DTB origin. - OF_SEPARATE, build separately from U-Boot - OF_BOARD, board specific way of providing the DTB - OF_EMBED embedded in the u-boot binary(should not be used in production Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org> Reviewed-by: Simon Glass <sjg@chromium.org>
2021-10-26arm: spl: prepare for jumping to OPTEERicardo Salveti1-0/+11
Make sure to (if applicable) flush the D-cache, invalidate I-cache, and disable MMU and caches before jumping to OPTEE. This fixes the SDP->SPL->OPTEE boot flow on iMX6Q and most likely on some other ARM SoCs. Signed-off-by: Ricardo Salveti <ricardo@foundries.io> Co-developed-by: Oleksandr Suvorov <oleksandr.suvorov@foundries.io> Signed-off-by: Oleksandr Suvorov <oleksandr.suvorov@foundries.io>
2021-10-25Merge branch 'master' of https://source.denx.de/u-boot/custodians/u-boot-sunxiTom Rini4-4/+11
- Add and enable watchdog driver - Prepare for SYSRESET driven AXP poweroff - Prepare for SoCs without MMC2 - Some fixes for extending SPL (SPL-DM for RISC-V) - Some preparations for proper VBUS management - Fix secure monitor move
2021-10-25sunxi: only include alias for eMMC when mmc2 usedIcenowy Zheng1-0/+2
Some Allwinner SoCs (e.g. R329) doesn't have a MMC2 controller at all, and on boards that we do not utilize MMC2, the alias for it is just useless. Only include the alias when we specify CONFIG_MMC_SUNXI_EXTRA_SLOT to 2. Signed-off-by: Icenowy Zheng <icenowy@sipeed.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2021-10-25sunxi: dts: H616: Enable the watchdogSamuel Holland1-1/+0
For some reason, the watchdog was disabled in the H616 device tree. Most likely this is a copy-paste from the H6 device tree: the H6 watchdog is disabled because it is broken in some chips. However, there is no evidence of issues with the H616 watchdog. Enable the watchdog node so it can be used by the driver. Signed-off-by: Samuel Holland <samuel@sholland.org> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2021-10-25Merge tag 'u-boot-imx-20211022' of ↵Tom Rini16-52/+508
https://gitlab.denx.de/u-boot/custodians/u-boot-imx u-boot-imx-20211022 ------------------- CI: https://source.denx.de/u-boot/custodians/u-boot-imx/-/pipelines/9561 - i.MX8: - Toradex Verdin (switch to binman, cleanup, etc.) - Phytec phycore_imx8mm (fixes, boot from SPI-NOR) - fixes for imx8mp_evk - doc (i.MX): MX8MM with Fast boot - i.MX6: - Toradex : colibri-imx6ull with eMMC, fixes - i.MX7ULP : - preparation for OPTEE + Serial Number - generic: - imx8m_image: Support ddr3 firmware
2021-10-25sunxi: Enable watchdog timer support by defaultSamuel Holland1-0/+1
A watchdog helps recover from hangs or failure to boot an OS. It can also be used by the sysreset framework to intentionally reset the system. Now that a driver is available, let's enable this functionality on sunxi boards. Signed-off-by: Samuel Holland <samuel@sholland.org> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2021-10-25sunxi: SPL SPI: Allow larger SPLAndre Przywara1-3/+7
The more recent Allwinner SoCs BootROMs can actually load SPL images larger than 32KB. We use this on the H616 to fit the extra code needed for the PMIC into the image, and have provisions in board.c to respect that larger SPL size when booting from MMC. However the sunxi SPL SPI loader has a hardcoded load offset of 32KB, which will fail on the H616. To fix this, use the same algorithm we use for MMC: if the SPL size is smaller than 32KB, we use 32KB, otherwise we expect the U-Boot payload directly after the SPL code. This prepares for SPI booting with larger SPLs like on the H616. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2021-10-25sunxi: Select SPL_SEPARATE_BSSSamuel Holland1-0/+1
sunxi-common.h defines CONFIG_SPL_BSS_START_ADDR to put SPL's BSS in DRAM. Due to this, we must select SPL_SEPARATE_BSS, or else SPL will attempt to load its DTB from the wrong address (after BSS in DRAM). This change fixes booting with SPL_OF_CONTROL=y. Signed-off-by: Samuel Holland <samuel@sholland.org> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2021-10-22Merge tag 'efi-2022-01-rc1' of ↵Tom Rini7-7/+76
https://source.denx.de/u-boot/custodians/u-boot-efi Pull request for efi-2022-01-rc1 Documentation: Use Sphinx 3.43. Move system reset documentation to HTML UEFI: Fix linking EFI apps with LLVM Fix alignment of loaded image Correct simple network protocol test Code cleanup
2021-10-21sandbox: provide /chosen/boot-hartid propertyHeinrich Schuchardt2-1/+26
On RISC-V the sandbox must provide the /chosen/boot-hartid in the devicetree. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2021-10-21mx7ulp: add getting a board serial numberRicardo Salveti1-0/+23
Get Unique ID of SoC iMX7ULP, using the logic described in Fusemap (IMX7ULPRMB2_Rev0_Fusemap) attached in the i.MX 7ULP APRM [1]. [1] https://www.nxp.com/docs/en/reference-manual/IMX7ULPRMB2.pdf Signed-off-by: Ricardo Salveti <ricardo@foundries.io> Co-developed-by: Oleksandr Suvorov <oleksandr.suvorov@foundries.io> Signed-off-by: Oleksandr Suvorov <oleksandr.suvorov@foundries.io> Reviewed-by: Fabio Estevam <festevam@gmail.com>
2021-10-21arm: dts: imx8mp: Delete default clocks for clock controller nodeYe Li1-0/+3
Since SPL has initialized clocks for bus and core. We don't need to set the default clocks for clock controller node. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Teresa Remmet <t.remmet@phytec.de> Tested-by: Andrey Zhizhikin <andrey.zhizhikin@leica-geosystems.com> Acked-by: Peng Fan <peng.fan@nxp.com>
2021-10-21arm: dts: imx8mp-evk: Enable the EQoS ethernet portYe Li2-0/+53
i.MX8MP EVK has two ethernet ports. Add relevant nodes and properties for EQoS port to the EVK DTS file. In -u-boot.dtsi, change the u-boot eqos compatible string, add PHY reset gpio and remove assigned clocks as not supported in CCF. Signed-off-by: Ye Li <ye.li@nxp.com>
2021-10-21arm: mach-imx: Allow to build mac.c for EQoS driverYe Li1-0/+1
i.MX8MP has one DWC EQoS controller, so allow to build mac.c when only this driver is enabled. Signed-off-by: Ye Li <ye.li@nxp.com>
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