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CPU: Freescale i.MX6ULL rev1.1 792 MHz (running at 396 MHz)
CPU: Industrial temperature grade (-40C to 105C) at 49C
Reset cause: POR
Model: Seeed NPi iMX6ULL Dev Board with NAND
Board: Seeed NPi i.MX6ULL Dev Board
DRAM: 512 MiB
NAND: 512 MiB
MMC: FSL_SDHC: 0
In: serial@2020000
Out: serial@2020000
Err: serial@2020000
Net: FEC0
Working:
- Eth0
- MMC/SD
- NAND
- UART 1
- USB host
Signed-off-by: Navin Sankar Velliangiri <navin@linumiz.com>
Note:
Changes in v2:
* removed unnecessary space in imx6ull-seeed-npi-imx6ull-dev-board.dts file.
* Used SZ_2M for CONFIG_SYS_MALLOC_LEN size allocation.
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Move this uncommon header out of the common header.
Signed-off-by: Simon Glass <sjg@chromium.org>
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Move this uncommon header out of the common header.
Signed-off-by: Simon Glass <sjg@chromium.org>
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Use the correct function to get the uncached address to access the SoC
registers.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
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Signed-off-by: Tom Rini <trini@konsulko.com>
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The LinkIt Smart 7688 modules have a MT7688 SoC with 128 MiB of RAM
and 32 MiB of flash (SPI NOR).
This patch also includes 2 targets. One is the target that can be
programmed into the SPI NOR flash and a 2nd target "xxx-ram" is
added to support loading and booting via an already running U-Boot
version. This allows easy development and testing without the
need to flash the image each time.
Signed-off-by: Stefan Roese <sr@denx.de>
[fixed and regenerated defconfig files]
Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
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