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2024-03-13configs: starfive_visionfive2: Set default fdt file to ↵Hal Feng1-1/+1
"jh7110-starfive-visionfive-2-v1.3b.dtb" Change the default fdt file from "jh7110-visionfive-v2.dtb" to "jh7110-starfive-visionfive-2-v1.3b.dtb", for sync with linux mainline. Signed-off-by: Hal Feng <hal.feng@starfivetech.com>
2024-02-23Support specifying dtb in ${boot_syslinux_conf}Hal Feng3-3/+3
With this patch, you can specify dtb to bootup kernel, using fdtdir in ${boot_syslinux_conf}. Generally boot_syslinux_conf=extlinux/extlinux.conf Signed-off-by: Yingpeng Liu <yingpeng.liu@starfivetech.com> Signed-off-by: Hal Feng <hal.feng@starfivetech.com>
2024-01-19configs: disable SPL_SPI_FLASH_TINY in defconfigZiv Xu3-0/+3
disable SPL_SPI_FLASH_TINY in defconfig Signed-off-by: Ziv Xu <ziv.xu@starfivetech.com>
2023-11-29configs: starfive: Add starfive_devkits_defconfigHal Feng1-0/+171
Add a defconfig file for StarFive JH7110 Devkits board. The code is ported from tag JH7110_DVK_515_v3.9.3 of Devkits repo. Signed-off-by: Hal Feng <hal.feng@starfivetech.com>
2023-11-29configs: starfive: Add starfive_visionfive2_defconfigHal Feng2-75/+168
Add a defconfig file for StarFive VisionFive 2 board. The code is ported from tag JH7110_VF2_515_v3.9.3 of VF2 repo. Signed-off-by: Hal Feng <hal.feng@starfivetech.com>
2023-09-07drivers: fastboot: Fix the error of writing sparse file with fastbootXingyu Wu1-0/+11
Add config for max block size to write in MMC with sparse file. Signed-off-by: Xingyu Wu <xingyu.wu@starfivetech.com>
2023-08-16riscv: starfive: jh7110-evb: Optimize boot commandsSamin Guo1-1/+2
- Optimize boot commands for jh7110-evb - Add CONFIG_DEFAULT_FDT_FILE for debian boot Signed-off-by: Samin Guo <samin.guo@starfivetech.com>
2023-07-26defconfig: starfive: enable HS200 supportWilliam Qiu1-0/+2
enable HS200 support. Signed-off-by: William Qiu <william.qiu@starfivetech.com>
2023-07-10riscv: jh7110: add spi nor flash SPI_FLASH_MACRONIX supportSamin Guo1-0/+1
Radxa uses macronix spi flash, so enable it. Signed-off-by: Samin Guo <samin.guo@starfivetech.com>
2023-07-10riscv: jh7110: set SPL_OPENSBI_LOAD_ADDRSamin Guo1-0/+1
set SPL_OPENSBI_LOAD_ADDR to 0x40000000 Signed-off-by: Samin Guo <samin.guo@starfivetech.com>
2023-06-20riscv: config: starfive: jh7110: mem sizeKeith Zhao1-1/+1
reduce the mem size from 800+M to 128M Signed-off-by: Keith Zhao <keith.zhao@starfivetech.com>
2023-05-05uboot: evb support boot from nvme ssdshanlong.li1-1/+1
support boot from nvme ssd Signed-off-by: shanlong.li <shanlong.li@starfivetech.com>
2023-03-30configs: starfive:　Enable CONFIG_OF_SEPARATE configurationYanhong Wang1-1/+2
Modify the mode of the DTB for DT Control from Embedded to separated. Signed-off-by: Yanhong Wang <yanhong.wang@starfivetech.com>
2023-03-17configs: starfive_visionfive_defconfig: Enable console to tty1Changhuang Liang2-2/+2
Enable console to tty1. Signed-off-by: Changhuang Liang <changhuang.liang@starfivetech.com>
2023-02-24Merge branch 'CR_3504_enable_sbi_command_michael.zhu' into 'jh7110-master'andy.hu1-0/+1
CR_3504: Enable sbi command in U-Boot See merge request sdk/u-boot!36
2023-02-22configs: starfive-jh7110: Add support for PCIe host driverMason Huo1-0/+6
Add the PCIe host driver config, also add the rtl8169 & nvme driver support. Signed-off-by: Mason Huo <mason.huo@starfivetech.com>
2023-02-21Enable sbi command in U-BootMichaelZhuxx1-0/+1
Signed-off-by: MichaelZhuxx <michael.zhu@starfivetech.com>
2023-02-17defconfig:riscv:jh7110: add mipi configkeith.zhao1-0/+25
add the new configs needed by mipi display Signed-off-by:keith.zhao<keith.zhao@statfivetech.com>
2023-01-11configs: starfive-jh7110: update the value of CONFIG_SYS_MALLOC_F_LENYanhong Wang1-5/+5
Update the value of CONFIG_SYS_MALLOC_F_LEN from 0x8000 to 0x10000. Signed-off-by: Yanhong Wang <yanhong.wang@starfivetech.com>
2022-11-21configs: Enable STARFIVE_PINCTRLJianlong Huang1-0/+4
Enable STARFIVE_PINCTRL and PINCTRL_FULL Signed-off-by: Jianlong Huang <jianlong.huang@starfivetech.com>
2022-11-02driver:qspi: Switch the QSPI parent clock to pll0Samin Guo1-1/+1
Switch the QSPI parent clock to pll0 to improve the QSPI speed Signed-off-by: Samin Guo <samin.guo@starfivetech.com>
2022-11-01board:starfive:evb: Support using env to detect board versionSamin Guo1-0/+2
JH7110B need tx_inverted by YT8521 phy, you need to read the chip version to determine whether to use it. Signed-off-by: Samin Guo <samin.guo@starfivetech.com>
2022-10-18configs: starfive_evb_defconfig: Support saveenvJianlong Huang1-0/+5
Add saveenv config to Support saveenv Signed-off-by: Jianlong Huang <jianlong.huang@starfivetech.com>
2022-10-18config:starfive-jh7110: add sd card boot configClivia.Cai1-1/+2
Configure SD card boot parameters Signed-off-by: Clivia.Cai <Clivia.Cai@starfivetech.com>
2022-10-18board:starfive:evb: update uart3-uart5 resetsyanhong.wang1-0/+1
Add SPL_DM_RESET to defconfig, and update uart3-uart5 reset for StarFive JH7110 SoC. Signed-off-by: yanhong.wang <yanhong.wang@starfivetech.com>
2022-10-18board:starfive:evb: add usb init configyanhong.wang1-0/+1
Add usb init config for starfive EVB board. Default set to USB2.0 Signed-off-by: yanhong.wang <yanhong.wang@starfivetech.com>
2022-10-18config:starfive-jh7110: add MICREL phy config to defconfigyanhong.wang1-0/+3
Add MICREL phy config to defconfig for starfive EVB board. Signed-off-by: yanhong.wang <yanhong.wang@starfivetech.com>
2022-10-18config:starfive-jh7110: update starfive evb board default configyanhong.wang1-0/+8
Add DDR config to the default config for starfive evb board. Signed-off-by: yanhong.wang <yanhong.wang@starfivetech.com>
2022-10-18board:starfive: add starfive evb board supportyanhong.wang1-0/+75
Add board support for StarFive EVB. Signed-off-by: yanhong.wang <yanhong.wang@starfivetech.com>
2022-10-18config:starfive-jh7110: add config file for jh7110yanhong.wang1-0/+75
Add basic config option for StarFive VisionFive board. Signed-off-by: yanhong.wang <yanhong.wang@starfivetech.com>
2021-09-23Merge git://source.denx.de/u-boot-socfpgaTom Rini1-2/+6
Bugfixes for this one socfpga platform
2021-09-22arm: socfpga: vining: Enable DW I2C driverMarek Vasut1-0/+1
The Designware I2C IP is used to communicate with I2C peripherals on SoCFPGA, and required to access I2C EEPROM on this board. Enable it. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Siew Chin Lim <elly.siew.chin.lim@intel.com> Cc: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> Cc: Tien Fong Chee <tien.fong.chee@intel.com>
2021-09-22arm: socfpga: vining: Set default SPI NOR mode and frequencyMarek Vasut1-0/+3
The SPI NOR bus mode is 0 on this system, update it accordingly. Increase frequency to 40 MHz and enable SFDP parsing, since the flashes on this system support that and it is a huge performance improvement. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Siew Chin Lim <elly.siew.chin.lim@intel.com> Cc: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> Cc: Tien Fong Chee <tien.fong.chee@intel.com>
2021-09-22arm: socfpga: vining: Set USB gadget manufacturer to Softing with capital SMarek Vasut1-1/+1
This was configured in downstream, so it is likely that most of the custom software used around the device depends on it. Make upstream compatible. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Siew Chin Lim <elly.siew.chin.lim@intel.com> Cc: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> Cc: Tien Fong Chee <tien.fong.chee@intel.com>
2021-09-22arm: socfpga: vining: Increase environment sizeMarek Vasut1-1/+1
Increase the environment size from 4k to 16k to prevent environment from becoming full. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Siew Chin Lim <elly.siew.chin.lim@intel.com> Cc: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> Cc: Tien Fong Chee <tien.fong.chee@intel.com>
2021-09-22configs: Enable USB3 on Allwinner H6 boardsSamuel Holland2-0/+10
Pine H64 and Orange Pi 3 both provide a USB3 type A port. Enable it in U-Boot. Signed-off-by: Samuel Holland <samuel@sholland.org> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2021-09-15configs: rpi: Enable SMBIOS sysinfo driverMatthias Brugger9-0/+18
Enable this driver to allow U-Boot to get SMBIOS table information from a device tree node. Signed-off-by: Matthias Brugger <mbrugger@suse.com> Acked-by: Fabian Vogt <fvogt@suse.com>
2021-09-15configs: Resync with savedefconfigTom Rini26-31/+5
Rsync all defconfig files using moveconfig.py Signed-off-by: Tom Rini <trini@konsulko.com>
2021-09-14ppc: Remove UCP1020 boardSimon Glass1-58/+0
This board has not been converted to CONFIG_DM_PCI by the deadline. Remove it. Note that we have to add CONFIG_SPIFLASH to scripts/config_whitelist.txt because it's not really migrated at this point. Acked-by: Michael Durrant <mdurrant@arcturusnetworks.com> Acked-by: Oleksandr Zhadan <oleks@arcturusnetworks.com> Acked-by: Oleksandr Zhadan and Michael Durrant <arcsupport@arcturusnetworks.com> Signed-off-by: Simon Glass <sjg@chromium.org> [trini: Handle CONFIG_SPIFLASH differently and delete Kconfig file] Signed-off-by: Tom Rini <trini@konsulko.com>
2021-09-11configs: j72*_evm: Define the buffer sizes for dfuAswath Govindraju4-0/+6
On J721e R5 SPL, dfu buffer for loading sysfw.itb image gets allocated before DRAM gets initialized. So, the buffer gets allocated in MCU L3 RAM. The current buffer size to be allocated is 256KB and the available total heap memory is 0x70000 (448KB). This leads to NOMEM errors during allocation. In other cases when constraints such as above are not present fix the size of buffers to the sector size in OSPI for proper functioning. Also, if CONFIG_SYS_DFU_DATA_BUF_SIZE is defined and CONFIG_SYS_DFU_MAX_FILE_SIZE is not defined then the max file size for dfu transfer is defined as CONFIG_SYS_DFU_DATA_BUF_SIZE. Fix these by setting appropriate buffer sizes in their respective defconfig files and defining the max file size as 8 MB which is the default dfu buffer size. Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
2021-09-11ARM: omap3: evm: Enable booting 'fitImage' with DEFAULT_FIT_TI_ARGSDerald D. Woods1-0/+1
This commit uses the existing DEFAULT_MMC_TI_ARGS and DEFAULT_FIT_TI_ARGS defintions to replace the 'mmc*' environment variables in the configuration. The check for the 'boot_fit' is handled like the 'am335x_*' boards with 'CONFIG_BOOTCOMMAND'. Signed-off-by: Derald D. Woods <woods.technical@gmail.com>
2021-09-11arm: am335x: Enable SPL_OF_CONTROL on some configsTom Rini2-0/+2
Both am335x_boneblack_vboot and am335x_evm_spiboot require SPL_OF_CONTROL to function but are currently missing this option. Add it. Signed-off-by: Tom Rini <trini@konsulko.com>
2021-09-10arm: mvebu: espressobin: Enable GPT partition supportPali Rohár1-0/+1
Signed-off-by: Pali Rohár <pali@kernel.org> Reviewed-by: Stefan Roese <sr@denx.de>
2021-09-10arm: mvebu: turris_{omnia, mox}: GPT partition supportPali Rohár2-0/+2
This allows U-Boot to access filesystems on GPT partitioned disks. Signed-off-by: Pali Rohár <pali@kernel.org> Reviewed-by: Stefan Roese <sr@denx.de>
2021-09-08common/spl: Drop [ST]PL_HASH_SUPPORT in favor of [ST]PL_HASHAlexandru Gagniuc5-5/+0
All of these configs exist. Stick to using CONFIG_[ST]PL_HASH, and drop all references to CONFIG_[ST]PL_HASH_SUPPORT. This means we need for CHAIN_OF_TRUST to select SPL_HASH now. Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com> [trini: Add TPL case, fix CHAIN_OF_TRUST, other tweaks] Signed-off-by: Tom Rini <trini@konsulko.com>
2021-09-08common: Remove unused CONFIG_FIT_SHAxxx selectorsAlexandru Gagniuc1-1/+1
Originally CONFIG_FIT_SHAxxx enabled specific SHA algos for and only for hash_calculate() in common/image-fit.c. However, since commit 14f061dcb1 ("image: Drop IMAGE_ENABLE_SHAxxx"), the correct selector was changed to CONFIG_SHAxxx. The extra "_FIT_" variants are neither used, nor needed. Remove them. One defconfig disables FIT_SHA256, which is now changed to 'SHA256'. CMD_MVEBU_BUBT needs to select select SHA256 to avoid undefined references to "sha256_*()". bubt.c needs sha256, so this selection is correct. It is not clear why this problem did not manifest before. Note that SHA selection in SPL is broken for this exact reason. There is no corresponding SPL_SHAxxx. Fixing this is is beyond the scope of this change. Also note that we make CONFIG_FIT now imply SHA256, to make up for FIT_SHA256 previously being a default y option. Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com> [trini: Add imply SHA256 to FIT] Signed-off-by: Tom Rini <trini@konsulko.com>
2021-09-07configs: qemu-riscvXX_spl_defconfig enable CMD_SBIHeinrich Schuchardt2-0/+2
Both for 64bit and 32bit at least on one board we should compile the sbi command. Enabling it on QEMU will allow to write a test for it. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2021-09-07riscv: enable booting HiFive Unmatched from SATAHeinrich Schuchardt1-0/+5
On the HiFive Unmatched a PCI to SATA adapter may be used to install a SATA drive. Enable booting from it. Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Mark Kettenis <kettenis@openbsd.org>
2021-09-01arm: mvebu: turris_omnia: disable MCU watchdog in SPL when booting over UARTMarek Behún1-0/+1
When booting over UART, sending U-Boot proper may take too much time and MCU watchdog will reset the board before U-Boot proper is loaded. Better disable MCU watchdog in SPL when booting over UART. Signed-off-by: Marek Behún <marek.behun@nic.cz> Reviewed-by: Pali Rohár <pali@kernel.org> Reviewed-by: Stefan Roese <sr@denx.de>
2021-09-01serial: a37xx: Remove CONFIG_DEBUG_UART_SHIFT optionsPali Rohár4-4/+0
Armada 37xx serial driver does not use CONFIG_DEBUG_UART_SHIFT. So do not define any bogus value for CONFIG_DEBUG_UART_SHIFT option in any Armada 37xx defconfig file. Signed-off-by: Pali Rohár <pali@kernel.org> Reviewed-by: Stefan Roese <sr@denx.de>
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