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path: root/drivers/ram/rockchip/sdram_rk3399.c
AgeCommit message (Expand)AuthorFilesLines
2020-12-14dm: treewide: Rename ..._platdata variables to just ..._platSimon Glass1-5/+4
2020-12-14dm: treewide: Rename ofdata_to_platdata() to of_to_plat()Simon Glass1-2/+2
2020-12-14dm: treewide: Rename dev_get_platdata() to dev_get_plat()Simon Glass1-3/+3
2020-12-14dm: treewide: Rename 'platdata' variables to just 'plat'Simon Glass1-1/+1
2020-12-13dm: treewide: Rename auto_alloc_size members to be shorterSimon Glass1-2/+2
2020-07-22ram: rk3399: Mark existing prints via RAM_ROCKCHIP_DEBUGJagan Teki1-4/+8
2020-07-22ram: rk3399: Drop debug stride in driverJagan Teki1-25/+0
2020-07-10dtoc: extend dtoc to use struct driver_info when linking nodesWalter Lozano1-1/+1
2020-05-19common: Drop linux/delay.h from common headerSimon Glass1-0/+1
2020-05-19common: Drop log.h from common headerSimon Glass1-0/+1
2020-05-19common: Drop init.h from common headerSimon Glass1-0/+1
2020-01-30arm: rockchip: Add common cru.hJagan Teki1-5/+5
2020-01-30ram: rk3399: don't assume phy_io_config() uses real regsThomas Hebb1-4/+2
2019-11-17ram: rk3399: Fix dram setting to make dram more stableYouMin Chen1-21/+20
2019-11-17ram: rk3399: update calculate_strideKever Yang1-39/+119
2019-11-17ram: rk3399: Sync the io setting from Rockchip vendor codeKever Yang1-30/+14
2019-11-17ram: rk3399: add support detect capacityYouMin Chen1-21/+215
2019-11-17ram: rk3399: update the function of sdram_initYouMin Chen1-123/+296
2019-11-17ram: rk3399: fix error about get_ddrc0_con reg addrYouMin Chen1-1/+1
2019-11-17ram: rk3399: Clean up codeYouMin Chen1-83/+93
2019-11-17ram: rk3399: migrate to use common codeYouMin Chen1-91/+72
2019-11-17ram: rockchip: rename sdram_common.c/h to sdram.cKever Yang1-1/+1
2019-08-23ram: rk3399: update cap and ddrconfig for each channel after initKever Yang1-78/+81
2019-07-20ram: rk3399: Add lpddr4 set rate supportJagan Teki1-12/+661
2019-07-20ram: rk3399: Add set_rate sdram rk3399 opsJagan Teki1-3/+8
2019-07-20ram: rk3399: Add LPPDR4 mr detectionJagan Teki1-0/+226
2019-07-20ram: rk3399: Handle data training via opsJagan Teki1-10/+33
2019-07-20ram: rk3399: Simplify data training first argumentJagan Teki1-5/+4
2019-07-20ram: rk3399: Update lpddr4 vref_mode_acJagan Teki1-1/+2
2019-07-20ram: rk3399: Update lpddr4 mode_sel based on io settingsJagan Teki1-2/+5
2019-07-20ram: rk3399: Update lpddr4 vref based on io settingsJagan Teki1-5/+14
2019-07-20ram: rk3399: Get lpddr4 tsel_rd_en from io settingsJagan Teki1-2/+6
2019-07-20ram: rk3399: Configure soc odt supportJagan Teki1-1/+48
2019-07-20ram: rk3399: Add tsel control clock driveJagan Teki1-2/+14
2019-07-20ram: sdram: Configure lpddr4 tsel rd, wr based on IO settingsJagan Teki1-6/+36
2019-07-20ram: rk3399: Add IO settingsJagan Teki1-0/+104
2019-07-20ram: rk3399: Don't disable dfi dram clk for lpddr4, rank 1Jagan Teki1-2/+12
2019-07-20ram: rk3399: Configure tsel write ca for lpddr4Jagan Teki1-3/+12
2019-07-20ram: rk3399: Map chipselect for lpddr4Jagan Teki1-0/+10
2019-07-20ram: rk3399: Configure PHY RX_CM_INPUT for lpddr4Jagan Teki1-0/+22
2019-07-20ram: rk3399: Configure SLEWP_EN, SLEWN_EN for lpddr4Jagan Teki1-0/+21
2019-07-20ram: rk3399: Configure BOOSTP_EN, BOOSTN_EN for lpddr4Jagan Teki1-0/+24
2019-07-20ram: rk3399: Configure PHY_898, PHY_919 for lpddr4Jagan Teki1-0/+5
2019-07-20ram: rk3399: Avoid two channel ZQ Cal Start at the same timeJagan Teki1-0/+14
2019-07-20ram: rk3399: Don't wait for PLL lock in lpddr4Jagan Teki1-10/+16
2019-07-20ram: rk3399: Move mode_sel assignmentJagan Teki1-9/+3
2019-07-20ram: rk3399: Add lpddr4 rank mask for wdql trainingJagan Teki1-1/+4
2019-07-20ram: rk3399: Add lpddr4 rank mask for ca trainingJagan Teki1-1/+4
2019-07-20ram: rk3399: Configure phy IO in ds odtJagan Teki1-165/+162
2019-07-20ram: rk3399: Add DdrModeJagan Teki1-1/+1
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