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starfive-tech/u-boot.git
Fedora_JH7100_2021.04
Fedora_JH7100_2021.07
Fedora_JH7100_upstream
Fedora_JH7100_upstream_devel
JH7100_Multimedia_V0.1.0
JH7100_VisionFive_OH_dev
JH7100_VisionFive_devel
JH7100_starlight_multimedia
JH7100_upstream
JH7100_upstream_devel
JH7110_VisionFive2_devel
JH7110_VisionFive2_devel-v3.9.3
dubhe_fpga_dev_v2023.10
master
rtthread_AMP
visionfive_devel
StarFive Tech U-Boot for VisionFive (JH7110) boards (mirror)
Andrey V.Kosteltsev
summary
refs
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tree
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path:
root
/
drivers
/
video
/
tegra124
Age
Commit message (
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)
Author
Files
Lines
2017-07-28
dm: video: tegra124: Convert to livetree
Simon Glass
3
-25
/
+11
2017-07-11
tegra: video: Time the LCD init
Simon Glass
1
-0
/
+2
2017-06-09
tegra: video: Don't power up the SOR twice
Simon Glass
1
-0
/
+9
2017-06-01
dm: Rename dev_addr..() functions
Simon Glass
1
-1
/
+1
2017-02-08
dm: core: Replace of_offset with accessor
Simon Glass
2
-5
/
+5
2017-01-03
video: tegra: fix spelling in comment
Marcel Ziswiler
1
-1
/
+1
2016-09-24
video: squash lines for immediate return
Masahiro Yamada
1
-7
/
+1
2016-02-16
tegra: nyan-big: Move the LCD driver to driver model
Simon Glass
4
-194
/
+235
2016-02-16
tegra: lcd: Merge tegra124-lcd.c into display.c
Simon Glass
3
-98
/
+79
2016-01-22
dm: video: Repurpose the 'displayport' uclass to 'display'
Simon Glass
2
-17
/
+10
2015-08-31
dm: Use dev_get_addr() where possible
Simon Glass
1
-2
/
+1
2015-06-09
tegra: lcd: Tidy up clock init
Simon Glass
1
-3
/
+1
2015-05-13
tegra124: video: Add full link training for eDP
Simon Glass
5
-64
/
+1079
2015-05-13
tegra: video: support eDP displays on Tegra124 devices
Simon Glass
3
-0
/
+457
2015-05-13
tegra: video: Add Embedded DisplayPort driver
Simon Glass
3
-0
/
+1265
2015-05-13
tegra: video: Support serial output resource (SOR) on tegra124
Simon Glass
3
-0
/
+1807