blob: 2f13a42235780d2741b56aa0770d10d303b3a2c9 (
plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
|
// SPDX-License-Identifier: BSD-2-Clause-Patent
//
// Copyright (c) 2021, Linaro Limited. All rights reserved.
//
/ {
aliases {
spi_nor = &spi_nor;
i2c0 = &i2c0;
};
spi_nor: spi@54800000 {
compatible = "socionext,synquacer-spi";
reg = <0x00 0x54800000 0x00 0x1000>;
interrupts = <0x00 0x9c 0x04 0x00 0x9d 0x04 0x00 0x9e 0x04>;
clocks = <&clk_alw_1_8>;
clock-names = "iHCLK";
socionext,use-rtm;
socionext,set-aces;
#address-cells = <1>;
#size-cells = <0>;
status = "okay";
active_clk_edges;
chipselect_num = <1>;
spi-flash@0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "jedec,spi-nor";
reg = <0>; /* Chip select 0 */
spi-max-frequency = <31250000>;
spi-rx-bus-width = <0x1>;
spi-tx-bus-width = <0x1>;
};
};
i2c0: i2c@51200000 {
compatible = "socionext,synquacer-i2c";
reg = <0x0 0x51200000 0x0 0x1000>;
interrupts = <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clk_i2c>;
clock-names = "pclk";
clock-frequency = <400000>;
#address-cells = <1>;
#size-cells = <0>;
status = "okay";
pcf8563: rtc@51 {
compatible = "nxp,pcf8563";
reg = <0x51>;
};
};
firmware {
optee {
status = "okay";
};
};
};
&smmu {
status = "okay";
};
&pcie0 {
status = "okay";
};
&pcie1 {
status = "okay";
};
&sdhci {
status = "okay";
};
|
