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path: root/arch/riscv/dts/dubhe-fpga-u-boot.dtsi
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// SPDX-License-Identifier: (GPL-2.0 OR MIT)
/* Copyright (c) 2021 StarFive Technology Co., Ltd. */

/ {
	chosen {
		stdout-path = "serial0";
	};

	config {
		u-boot,spl-payload-offset = <0x22000>;
	};

	cpus {
		u-boot,dm-spl;
		cpu@0 {
			u-boot,dm-spl;
		};
	};

	memory@80000000 {
		u-boot,dm-spl;
	};

	soc {
		u-boot,dm-spl;
		dmc: dmc@10280000 {
			compatible = "starfive,dubhe-ddr";
			reg = <0x0 0x10280000 0x0 0x10000
			       0x0 0x10290000 0x0 0x10000
			       0x0 0x102A0000 0x0 0x10000>;
			clocks = <&pbus_clk>;
			clock-frequency = <25000000>;
			u-boot,dm-spl;
		};
	};
};

&spi0 {
	u-boot,dm-spl;
	
	mmc@0 {
		u-boot,dm-spl;
	};
};

&qspi1 {
	u-boot,dm-spl;

	flash@0 {
		u-boot,dm-spl;
	};
};

&uart0 {
	u-boot,dm-spl;
};

&pbus_clk {
	u-boot,dm-spl;
};

&clint {
	clocks = <&pbus_clk>;
	u-boot,dm-spl;
};

&cpu0_intc {
	u-boot,dm-spl;
};