diff options
Diffstat (limited to 'meta-openbmc-mods/meta-ast2600/recipes-bsp/u-boot/files/0006-SPI-Quad-IO-Mode.patch')
| -rw-r--r-- | meta-openbmc-mods/meta-ast2600/recipes-bsp/u-boot/files/0006-SPI-Quad-IO-Mode.patch | 16 |
1 files changed, 8 insertions, 8 deletions
diff --git a/meta-openbmc-mods/meta-ast2600/recipes-bsp/u-boot/files/0006-SPI-Quad-IO-Mode.patch b/meta-openbmc-mods/meta-ast2600/recipes-bsp/u-boot/files/0006-SPI-Quad-IO-Mode.patch index 720d165c5..612a104b5 100644 --- a/meta-openbmc-mods/meta-ast2600/recipes-bsp/u-boot/files/0006-SPI-Quad-IO-Mode.patch +++ b/meta-openbmc-mods/meta-ast2600/recipes-bsp/u-boot/files/0006-SPI-Quad-IO-Mode.patch @@ -1,4 +1,4 @@ -From fd0768e6a63a25fdc87596036a5cbf82a88a1eb6 Mon Sep 17 00:00:00 2001 +From ddd0ebfaf667f2fd36ed2f8d2d8456dbc6acdaa8 Mon Sep 17 00:00:00 2001 From: arun-pm <arun.p.m@linux.intel.com> Date: Fri, 29 Nov 2019 00:19:09 +0530 Subject: [PATCH] SPI Quad IO Mode @@ -37,10 +37,10 @@ index 9a15e204f83b..1f14753056ee 100644 }; diff --git a/drivers/mtd/spi/spi-nor-ids.c b/drivers/mtd/spi/spi-nor-ids.c -index 3b0a910d3fca..d6b949170570 100644 +index 5882eab2e3fc..42546f4d222a 100644 --- a/drivers/mtd/spi/spi-nor-ids.c +++ b/drivers/mtd/spi/spi-nor-ids.c -@@ -164,7 +164,12 @@ const struct flash_info spi_nor_ids[] = { +@@ -189,7 +189,12 @@ const struct flash_info spi_nor_ids[] = { { INFO("n25q256ax1", 0x20bb19, 0, 64 * 1024, 512, SECT_4K | SPI_NOR_QUAD_READ | SPI_NOR_4B_OPCODES) }, { INFO("n25q512a", 0x20bb20, 0, 64 * 1024, 1024, SECT_4K | USE_FSR | SPI_NOR_QUAD_READ | SPI_NOR_4B_OPCODES) }, { INFO("n25q512ax3", 0x20ba20, 0, 64 * 1024, 1024, SECT_4K | USE_FSR | SPI_NOR_QUAD_READ | SPI_NOR_4B_OPCODES) }, @@ -51,11 +51,11 @@ index 3b0a910d3fca..d6b949170570 100644 + * back(Note:- Certain other chips having same name(n25q00) but different part number has no issues). + */ + { INFO("n25q00", 0x20ba21, 0, 64 * 1024, 2048, SECT_4K | USE_FSR | NO_CHIP_ERASE) }, + { INFO("mt25ql02g", 0x20ba22, 0, 64 * 1024, 4096, SECT_4K | USE_FSR | SPI_NOR_QUAD_READ | NO_CHIP_ERASE) }, { INFO("n25q00a", 0x20bb21, 0, 64 * 1024, 2048, SECT_4K | USE_FSR | SPI_NOR_QUAD_READ | NO_CHIP_ERASE) }, { INFO("mt25qu02g", 0x20bb22, 0, 64 * 1024, 4096, SECT_4K | USE_FSR | SPI_NOR_QUAD_READ | NO_CHIP_ERASE) }, - #endif diff --git a/drivers/spi/aspeed_spi.c b/drivers/spi/aspeed_spi.c -index 18d4c2fa098e..6efb8c4e3c65 100644 +index f93200f8f67e..8ac6e40524fe 100644 --- a/drivers/spi/aspeed_spi.c +++ b/drivers/spi/aspeed_spi.c @@ -17,6 +17,9 @@ @@ -68,13 +68,13 @@ index 18d4c2fa098e..6efb8c4e3c65 100644 struct aspeed_spi_regs { u32 conf; /* 0x00 CE Type Setting */ -@@ -1037,6 +1040,19 @@ static int aspeed_spi_bind(struct udevice *bus) +@@ -1059,6 +1062,19 @@ static int aspeed_spi_bind(struct udevice *bus) return 0; } +static int aspeed_get_max_freq(void) +{ -+ u32 rev_id = readl(ASPEED_REVISION_ID); ++ u32 rev_id = readl(ASPEED_REVISION_ID0); + + /*Limit max spi frequency less than 50MHz on AST2600-A0 due + * to FWSPICLK signal quality issue. @@ -88,7 +88,7 @@ index 18d4c2fa098e..6efb8c4e3c65 100644 static int aspeed_spi_probe(struct udevice *bus) { struct resource res_regs, res_ahb; -@@ -1067,7 +1083,7 @@ static int aspeed_spi_probe(struct udevice *bus) +@@ -1089,7 +1105,7 @@ static int aspeed_spi_probe(struct udevice *bus) clk_free(&hclk); priv->max_hz = dev_read_u32_default(bus, "spi-max-frequency", |