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| author | Biju Das <biju.das.jz@bp.renesas.com> | 2022-04-25 20:05:22 +0300 |
|---|---|---|
| committer | Geert Uytterhoeven <geert+renesas@glider.be> | 2022-04-28 17:51:33 +0300 |
| commit | e42faad1ef822e186c20e60576b198e1ac9866c4 (patch) | |
| tree | 91372f4b5bf78068ced8628ae2abbbb3ed60593c /arch/arm64/boot/dts/renesas/r9a07g043.dtsi | |
| parent | 1de1b44833e394e63119fcff37e458a94c244799 (diff) | |
| download | linux-e42faad1ef822e186c20e60576b198e1ac9866c4.tar.xz | |
arm64: dts: renesas: r9a07g043: Fillup the OSTM{0,1,2} stub nodes
Fillup the OSTM{0,1,2} stub nodes in RZ/G2UL (R9A07G043) SoC DTSI.
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Link: https://lore.kernel.org/r/20220425170530.200921-6-biju.das.jz@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Diffstat (limited to 'arch/arm64/boot/dts/renesas/r9a07g043.dtsi')
| -rw-r--r-- | arch/arm64/boot/dts/renesas/r9a07g043.dtsi | 24 |
1 files changed, 21 insertions, 3 deletions
diff --git a/arch/arm64/boot/dts/renesas/r9a07g043.dtsi b/arch/arm64/boot/dts/renesas/r9a07g043.dtsi index 60db9b02e0a7..d161600495aa 100644 --- a/arch/arm64/boot/dts/renesas/r9a07g043.dtsi +++ b/arch/arm64/boot/dts/renesas/r9a07g043.dtsi @@ -704,18 +704,36 @@ }; ostm0: timer@12801000 { + compatible = "renesas,r9a07g043-ostm", + "renesas,ostm"; reg = <0x0 0x12801000 0x0 0x400>; - /* place holder */ + interrupts = <GIC_SPI 46 IRQ_TYPE_EDGE_RISING>; + clocks = <&cpg CPG_MOD R9A07G043_OSTM0_PCLK>; + resets = <&cpg R9A07G043_OSTM0_PRESETZ>; + power-domains = <&cpg>; + status = "disabled"; }; ostm1: timer@12801400 { + compatible = "renesas,r9a07g043-ostm", + "renesas,ostm"; reg = <0x0 0x12801400 0x0 0x400>; - /* place holder */ + interrupts = <GIC_SPI 47 IRQ_TYPE_EDGE_RISING>; + clocks = <&cpg CPG_MOD R9A07G043_OSTM1_PCLK>; + resets = <&cpg R9A07G043_OSTM1_PRESETZ>; + power-domains = <&cpg>; + status = "disabled"; }; ostm2: timer@12801800 { + compatible = "renesas,r9a07g043-ostm", + "renesas,ostm"; reg = <0x0 0x12801800 0x0 0x400>; - /* place holder */ + interrupts = <GIC_SPI 48 IRQ_TYPE_EDGE_RISING>; + clocks = <&cpg CPG_MOD R9A07G043_OSTM2_PCLK>; + resets = <&cpg R9A07G043_OSTM2_PRESETZ>; + power-domains = <&cpg>; + status = "disabled"; }; }; |