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authorBiju Das <biju.das.jz@bp.renesas.com>2021-12-08 17:27:29 +0300
committerGeert Uytterhoeven <geert+renesas@glider.be>2021-12-14 14:29:17 +0300
commit88404c56fde05eb741552a33fdfe6d7d20c1c986 (patch)
tree77c86d7980d548de1158c3a69e5b2c71bc48ccc9 /arch/arm64/boot/dts/renesas/r9a07g044.dtsi
parent844dd4378453ad8234498ebc330887209e8ad346 (diff)
downloadlinux-88404c56fde05eb741552a33fdfe6d7d20c1c986.tar.xz
arm64: dts: renesas: r9a07g044: Create thermal zone to support IPA
Setup a thermal zone driven by SoC temperature sensor. Create passive trip points and bind them to CPUFreq cooling device that supports power extension. Based on the work done by Dien Pham <dien.pham.ry@renesas.com> and others for r8a77990 SoC. Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Link: https://lore.kernel.org/r/20211208142729.2456-3-biju.das.jz@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Diffstat (limited to 'arch/arm64/boot/dts/renesas/r9a07g044.dtsi')
-rw-r--r--arch/arm64/boot/dts/renesas/r9a07g044.dtsi16
1 files changed, 16 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/renesas/r9a07g044.dtsi b/arch/arm64/boot/dts/renesas/r9a07g044.dtsi
index ea528580f306..2639fd383010 100644
--- a/arch/arm64/boot/dts/renesas/r9a07g044.dtsi
+++ b/arch/arm64/boot/dts/renesas/r9a07g044.dtsi
@@ -88,6 +88,7 @@
compatible = "arm,cortex-a55";
reg = <0>;
device_type = "cpu";
+ #cooling-cells = <2>;
next-level-cache = <&L3_CA55>;
enable-method = "psci";
clocks = <&cpg CPG_CORE R9A07G044_CLK_I>;
@@ -917,6 +918,15 @@
polling-delay-passive = <250>;
polling-delay = <1000>;
thermal-sensors = <&tsu 0>;
+ sustainable-power = <717>;
+
+ cooling-maps {
+ map0 {
+ trip = <&target>;
+ cooling-device = <&cpu0 0 2>;
+ contribution = <1024>;
+ };
+ };
trips {
sensor_crit: sensor-crit {
@@ -924,6 +934,12 @@
hysteresis = <1000>;
type = "critical";
};
+
+ target: trip-point {
+ temperature = <100000>;
+ hysteresis = <1000>;
+ type = "passive";
+ };
};
};
};