diff options
| author | Biju Das <biju.das.jz@bp.renesas.com> | 2022-02-03 20:06:36 +0300 |
|---|---|---|
| committer | Geert Uytterhoeven <geert+renesas@glider.be> | 2022-02-08 11:45:59 +0300 |
| commit | 46da632734a5979090ef588d9da40367581fd400 (patch) | |
| tree | c3fab60f19fcc1896dc08e7d5f96650daf27c232 /arch/arm64/boot/dts/renesas/rzg2lc-smarc.dtsi | |
| parent | fa00d6dc19283bee13f0390546f741293f6d2d9a (diff) | |
| download | linux-46da632734a5979090ef588d9da40367581fd400.tar.xz | |
arm64: dts: renesas: rzg2lc-smarc: Enable CANFD channel 1
On RZ/G2LC SMARC EVK, CAN0 is not populated.
CAN1 is multiplexed with SCIF1 using SW1[3] or RSPI using SW1[4].
This patch adds support for the CAN1 interface on RZ/G2LC SMARC EVK.
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Link: https://lore.kernel.org/r/20220203170636.7747-5-biju.das.jz@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Diffstat (limited to 'arch/arm64/boot/dts/renesas/rzg2lc-smarc.dtsi')
| -rw-r--r-- | arch/arm64/boot/dts/renesas/rzg2lc-smarc.dtsi | 13 |
1 files changed, 13 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/renesas/rzg2lc-smarc.dtsi b/arch/arm64/boot/dts/renesas/rzg2lc-smarc.dtsi index 1b59ef376296..28f21c287ba3 100644 --- a/arch/arm64/boot/dts/renesas/rzg2lc-smarc.dtsi +++ b/arch/arm64/boot/dts/renesas/rzg2lc-smarc.dtsi @@ -44,6 +44,19 @@ }; }; +#if (SW_SCIF_CAN || SW_RSPI_CAN) +&canfd { + pinctrl-0 = <&can1_pins>; + /delete-node/ channel@0; +}; +#else +&canfd { + /delete-property/ pinctrl-0; + /delete-property/ pinctrl-names; + status = "disabled"; +}; +#endif + /* * To enable SCIF1 (SER0) on PMOD1 (CN7), On connector board * SW1 should be at position 2->3 so that SER0_CTS# line is activated |