diff options
| author | Tiezhu Yang <yangtiezhu@loongson.cn> | 2021-02-09 08:05:25 +0300 |
|---|---|---|
| committer | Thomas Bogendoerfer <tsbogend@alpha.franken.de> | 2021-02-11 13:04:31 +0300 |
| commit | ee54d379fc9c490797aa71d25d0320b5af5924a1 (patch) | |
| tree | dec1f2d42a36d1205e41e31b687c629ac0cc71a5 /arch/mips/include/asm/mipsregs.h | |
| parent | e66ef72d269105cee2ae9c8fa0442d7a9857324f (diff) | |
| download | linux-ee54d379fc9c490797aa71d25d0320b5af5924a1.tar.xz | |
MIPS: Make check condition for SDBBP consistent with EJTAG spec
According to MIPS EJTAG Specification [1], a Debug Breakpoint
exception occurs when an SDBBP instruction is executed, the
CP0_DEBUG bit DBp indicates that a Debug Breakpoint exception
occurred.
When I read the original code, it looks a little confusing
at first glance, just check bit DBp for SDBBP to make the
code more readable, it will be much easier to understand.
[1] http://www.t-es-t.hu/download/mips/md00047f.pdf
Signed-off-by: Tiezhu Yang <yangtiezhu@loongson.cn>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Diffstat (limited to 'arch/mips/include/asm/mipsregs.h')
| -rw-r--r-- | arch/mips/include/asm/mipsregs.h | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/arch/mips/include/asm/mipsregs.h b/arch/mips/include/asm/mipsregs.h index a0e8ae5497b6..9c8099a6ffed 100644 --- a/arch/mips/include/asm/mipsregs.h +++ b/arch/mips/include/asm/mipsregs.h @@ -1085,6 +1085,10 @@ #define CVMVMCONF_RMMUSIZEM1_S 0 #define CVMVMCONF_RMMUSIZEM1 (_U64CAST_(0xff) << CVMVMCONF_RMMUSIZEM1_S) +/* Debug register field definitions */ +#define MIPS_DEBUG_DBP_SHIFT 1 +#define MIPS_DEBUG_DBP (_ULCAST_(1) << MIPS_DEBUG_DBP_SHIFT) + /* * Coprocessor 1 (FPU) register names */ |