diff options
| author | Paul Hsieh <Paul.Hsieh@amd.com> | 2023-03-22 12:46:31 +0300 |
|---|---|---|
| committer | Alex Deucher <alexander.deucher@amd.com> | 2023-04-12 01:03:35 +0300 |
| commit | 385c3e4c29e1d4ce8f68687a8c84621e4c0e0416 (patch) | |
| tree | 953755c724763a3a78c5310b818846be3a3ea141 /drivers/gpu/drm/amd/display/dc/dml/dcn30/display_mode_vba_30.c | |
| parent | 6f6869dcf415f7c222057a3f07c23667e1758585 (diff) | |
| download | linux-385c3e4c29e1d4ce8f68687a8c84621e4c0e0416.tar.xz | |
drm/amd/display: Correct DML calculation to follow HW SPEC
[Why]
In 2560x1600@240p eDP panel, driver use lowest voltage level
to play 1080p video cause underflow. According to HW SPEC,
the senario should use high voltage level.
[How]
ChromaPre value is zero when bandwidth validation.
Correct ChromaPre calculation.
Reviewed-by: Nicholas Kazlauskas <Nicholas.Kazlauskas@amd.com>
Reviewed-by: Jun Lei <Jun.Lei@amd.com>
Acked-by: Qingqing Zhuo <qingqing.zhuo@amd.com>
Signed-off-by: Paul Hsieh <Paul.Hsieh@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/display/dc/dml/dcn30/display_mode_vba_30.c')
| -rw-r--r-- | drivers/gpu/drm/amd/display/dc/dml/dcn30/display_mode_vba_30.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/gpu/drm/amd/display/dc/dml/dcn30/display_mode_vba_30.c b/drivers/gpu/drm/amd/display/dc/dml/dcn30/display_mode_vba_30.c index d0303173ce80..7d0626e42ea6 100644 --- a/drivers/gpu/drm/amd/display/dc/dml/dcn30/display_mode_vba_30.c +++ b/drivers/gpu/drm/amd/display/dc/dml/dcn30/display_mode_vba_30.c @@ -4864,7 +4864,7 @@ void dml30_ModeSupportAndSystemConfigurationFull(struct display_mode_lib *mode_l v->DETBufferSizeCThisState[k], &v->UrgentBurstFactorCursorPre[k], &v->UrgentBurstFactorLumaPre[k], - &v->UrgentBurstFactorChroma[k], + &v->UrgentBurstFactorChromaPre[k], &v->NoUrgentLatencyHidingPre[k]); } |