diff options
Diffstat (limited to 'drivers/gpu/drm/amd/display/dc/core/dc_link_hwss.c')
| -rw-r--r-- | drivers/gpu/drm/amd/display/dc/core/dc_link_hwss.c | 24 |
1 files changed, 17 insertions, 7 deletions
diff --git a/drivers/gpu/drm/amd/display/dc/core/dc_link_hwss.c b/drivers/gpu/drm/amd/display/dc/core/dc_link_hwss.c index 6590f51caefa..dd88eb348dfa 100644 --- a/drivers/gpu/drm/amd/display/dc/core/dc_link_hwss.c +++ b/drivers/gpu/drm/amd/display/dc/core/dc_link_hwss.c @@ -14,6 +14,7 @@ #include "dpcd_defs.h" #include "dsc.h" #include "resource.h" +#include "clk_mgr.h" static uint8_t convert_to_count(uint8_t lttpr_repeater_count) { @@ -123,6 +124,11 @@ void dp_enable_link_phy( } } + link->cur_link_settings = *link_settings; + + if (dc->clk_mgr->funcs->notify_link_rate_change) + dc->clk_mgr->funcs->notify_link_rate_change(dc->clk_mgr, link); + if (dmcu != NULL && dmcu->funcs->lock_phy) dmcu->funcs->lock_phy(dmcu); @@ -141,8 +147,6 @@ void dp_enable_link_phy( if (dmcu != NULL && dmcu->funcs->unlock_phy) dmcu->funcs->unlock_phy(dmcu); - link->cur_link_settings = *link_settings; - dp_receiver_power_ctrl(link, true); } @@ -151,7 +155,8 @@ bool edp_receiver_ready_T9(struct dc_link *link) unsigned int tries = 0; unsigned char sinkstatus = 0; unsigned char edpRev = 0; - enum dc_status result = DC_OK; + enum dc_status result; + result = core_link_read_dpcd(link, DP_EDP_DPCD_REV, &edpRev, sizeof(edpRev)); /* start from eDP version 1.2, SINK_STAUS indicate the sink is ready.*/ @@ -167,7 +172,8 @@ bool edp_receiver_ready_T9(struct dc_link *link) } while (++tries < 50); } - if (link->local_sink->edid_caps.panel_patch.extra_delay_backlight_off > 0) + if (link->local_sink && + link->local_sink->edid_caps.panel_patch.extra_delay_backlight_off > 0) udelay(link->local_sink->edid_caps.panel_patch.extra_delay_backlight_off * 1000); return result; @@ -176,7 +182,7 @@ bool edp_receiver_ready_T7(struct dc_link *link) { unsigned char sinkstatus = 0; unsigned char edpRev = 0; - enum dc_status result = DC_OK; + enum dc_status result; /* use absolute time stamp to constrain max T7*/ unsigned long long enter_timestamp = 0; @@ -201,7 +207,8 @@ bool edp_receiver_ready_T7(struct dc_link *link) } while (time_taken_in_ns < 50 * 1000000); //MAx T7 is 50ms } - if (link->local_sink->edid_caps.panel_patch.extra_t7_ms > 0) + if (link->local_sink && + link->local_sink->edid_caps.panel_patch.extra_t7_ms > 0) udelay(link->local_sink->edid_caps.panel_patch.extra_t7_ms * 1000); return result; @@ -231,6 +238,9 @@ void dp_disable_link_phy(struct dc_link *link, enum signal_type signal) /* Clear current link setting.*/ memset(&link->cur_link_settings, 0, sizeof(link->cur_link_settings)); + + if (dc->clk_mgr->funcs->notify_link_rate_change) + dc->clk_mgr->funcs->notify_link_rate_change(dc->clk_mgr, link); } void dp_disable_link_phy_mst(struct dc_link *link, enum signal_type signal) @@ -281,7 +291,7 @@ void dp_set_hw_lane_settings( { struct link_encoder *encoder = link->link_enc; - if (!link->is_lttpr_mode_transparent && !is_immediate_downstream(link, offset)) + if (link->lttpr_non_transparent_mode && !is_immediate_downstream(link, offset)) return; /* call Encoder to set lane settings */ |