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2022-06-17arm64: dts: renesas: Fix thermal-sensors on single-zone sensorsGeert Uytterhoeven1-1/+1
"make dtbs_check": arch/arm64/boot/dts/renesas/r8a774c0-cat874.dtb: thermal-zones: cpu-thermal:thermal-sensors: [[74], [0]] is too long arch/arm64/boot/dts/renesas/r8a774c0-ek874.dtb: thermal-zones: cpu-thermal:thermal-sensors: [[79], [0]] is too long arch/arm64/boot/dts/renesas/r8a774c0-ek874-idk-2121wr.dtb: thermal-zones: cpu-thermal:thermal-sensors: [[82], [0]] is too long arch/arm64/boot/dts/renesas/r8a774c0-ek874-mipi-2.1.dtb: thermal-zones: cpu-thermal:thermal-sensors: [[87], [0]] is too long arch/arm64/boot/dts/renesas/r8a77990-ebisu.dtb: thermal-zones: cpu-thermal:thermal-sensors: [[105], [0]] is too long From schema: Documentation/devicetree/bindings/thermal/thermal-zones.yaml Indeed, the thermal sensors on R-Car E3 and RZ/G2E support only a single zone, hence #thermal-sensor-cells = <0>. Fix this by dropping the bogus zero cell from the thermal sensor specifiers. Fixes: 8fa7d18f9ee2dc20 ("arm64: dts: renesas: r8a77990: Create thermal zone to support IPA") Fixes: 8438bfda9d768157 ("arm64: dts: renesas: r8a774c0: Create thermal zone to support IPA") Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se> Link: https://lore.kernel.org/r/28b812fdd1fc3698311fac984ab8b91d3d655c1c.1655301684.git.geert+renesas@glider.be
2022-06-17arm64: dts: renesas: Add missing space after remote-endpointNiklas Söderlund1-2/+2
Add the missing space after remote-endpoint in r8a774c0.dtsi and r8a77990.dtsi before the typo spreads to other files. Signed-off-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se> Link: https://lore.kernel.org/r/20220608175728.1012550-1-niklas.soderlund+renesas@ragnatech.se Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2022-05-06arm64: dts: renesas: Add interrupt-names to CANFD nodesGeert Uytterhoeven1-0/+1
The Renesas R-Car CAN-FD Controller on R-Car Gen3 and RZ/G2 SoCs has two interrupts. Add interrupt-names properties to all CAN-FD device nodes to identify the individual interrupts, so we can make this property a required property in the DT bindings. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/10eef1e20372af4a156b06df8e5124666ec7c6b6.1651512451.git.geert+renesas@glider.be
2022-05-06arm64: dts: renesas: Remove empty rgb output endpointsLaurent Pinchart1-2/+0
Endpoints node must have a remote-endpoint property, as endpoints only exist to model a link between ports. Drop the empty rgb output endpoints from SoC dtsi files, and declare them in the board dts instead. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Reviewed-by: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com> Link: https://lore.kernel.org/r/20220424161228.8147-2-laurent.pinchart+renesas@ideasonboard.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2022-05-06arm64: dts: renesas: Remove empty lvds endpointsLaurent Pinchart1-4/+0
Endpoints node must have a remote-endpoint property, as endpoints only exist to model a link between ports. Drop the empty lvds endpoints from SoC dtsi files, they should be instead declared in the board dts or in overlays. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Reviewed-by: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com> Link: https://lore.kernel.org/r/20220424161228.8147-1-laurent.pinchart+renesas@ideasonboard.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2022-04-13arm64: dts: renesas: rzg2: Add interrupt properties to watchdog nodesWolfram Sang1-0/+1
Driver doesn't use it yet, but let's describe the HW properly. Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Link: https://lore.kernel.org/r/20220322095512.4707-5-wsa+renesas@sang-engineering.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2022-01-28arm64: dts: renesas: Miscellaneous whitespace fixesGeert Uytterhoeven1-5/+5
Make whitespace and indentation more consistent. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/3f2bcae1253c7a31d3eb6755185092a1f2b99b09.1642524439.git.geert+renesas@glider.be
2021-11-26arm64: dts: renesas: Fix operating point table node namesGeert Uytterhoeven1-1/+1
Align the node names of device nodes representing operating point v2 tables with the expectations of the DT bindings in Documentation/devicetree/bindings/opp/opp-v2.yaml. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se> Link: https://lore.kernel.org/r/ac885456ffb00fa4cc4069b9967761df2c98c3d8.1637764588.git.geert+renesas@glider.be
2021-11-19arm64: dts: reneas: rzg2: Add SDnH clocksWolfram Sang1-3/+6
Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Link: https://lore.kernel.org/r/20211110191610.5664-9-wsa+renesas@sang-engineering.com Link: https://lore.kernel.org/r/20211110191610.5664-10-wsa+renesas@sang-engineering.com Link: https://lore.kernel.org/r/20211110191610.5664-11-wsa+renesas@sang-engineering.com Link: https://lore.kernel.org/r/20211110191610.5664-12-wsa+renesas@sang-engineering.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2021-07-19arm64: dts: renesas: rzg2: Rename i2c_dvfs to iic_pmicGeert Uytterhoeven1-1/+1
As RZ/G2 SoCs do not support DVFS, the "iic-dvfs" module was renamed to "iic-pmic" in the RZ/G Series, 2nd Generation User’s Manual: Hardware Rev. 1.00. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se> Link: https://lore.kernel.org/r/3fee803a7464a3243e62a943a6a5dce8f1c65a2d.1624016811.git.geert+renesas@glider.be
2021-07-19arm64: dts: renesas: r8a774c0: Add generic compatible string to IIC nodeGeert Uytterhoeven1-2/+4
According to the Hardware User's Manual, automatic transmission for PMIC control (DVFS) is not available" on the RZ/G2E SoC. This really means that support for automatic DVFS is not present, while the IIC automatic transmission feature itself is still available, albeit not super useful. Hence there is no longer a reason not to declare compatibility with the R-Car Gen3-specific and generic versions. Accordingly, extend the reg property to cover the automatic transmission registers. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Link: https://lore.kernel.org/r/d222c2faa63f95d672efa07e55e8d01bddd17e65.1624013699.git.geert+renesas@glider.be
2021-05-25arm64: dts: renesas: Add fck to etheravb-rcar-gen3 clock-names listAdam Ford1-0/+1
The bindings have been updated to support two clocks. Add a clock-names list in the device tree with fck in it. Signed-off-by: Adam Ford <aford173@gmail.com> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Link: https://lore.kernel.org/r/20210224115146.9131-3-aford173@gmail.com [geert: Update new r8a779a0.dtsi] Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2021-04-27arm64: dts: renesas: Add port@0 node for all CSI-2 nodes to dtsiNiklas Söderlund1-0/+4
The port@0 is a mandatory port, add or move the declaration to the CSI-2 nodes top declared in dtsi files instead of depending on dts files adding them when describing the external connection. This fixes validation warnings for DTB outputs that do not connect all CSI-2 receivers to transmitters and thus declaring all port@0 nodes in dts files. Signed-off-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se> Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Link: https://lore.kernel.org/r/20210421150221.3202955-3-niklas.soderlund+renesas@ragnatech.se Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2021-01-11arm64: dts: renesas: rzg2: Add RPC-IF SupportAdam Ford1-0/+17
The RZ/G2 series contain the SPI Multi I/O Bus Controller (RPC-IF). Add the nodes, but make them disabled by default. Signed-off-by: Adam Ford <aford173@gmail.com> Link: https://lore.kernel.org/r/20210102115412.3402059-4-aford173@gmail.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2020-11-10arm64: dts: renesas: rzg2: Convert EtherAVB to explicit delay handlingGeert Uytterhoeven1-0/+1
Some EtherAVB variants support internal clock delay configuration, which can add larger delays than the delays that are typically supported by the PHY (using an "rgmii-*id" PHY mode, and/or "[rt]xc-skew-ps" properties). Historically, the EtherAVB driver configured these delays based on the "rgmii-*id" PHY mode. This was wrong, as these are meant solely for the PHY, not for the MAC. Hence properties were introduced for explicit configuration of these delays. Convert the RZ/G2 DTS files from the old to the new scheme: - Add default "rx-internal-delay-ps" and "tx-internal-delay-ps" properties to the SoC .dtsi files, to be overridden by board files where needed, - Convert board files from "rgmii-*id" PHY modes to "rgmii", adding the appropriate "rx-internal-delay-ps" and/or "tx-internal-delay-ps" overrides. Notes: - RZ/G2E does not support TX internal delay handling. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/20200819134344.27813-8-geert+renesas@glider.be
2020-09-18arm64: dts: renesas: r8a774c0: Fix MSIOF1 DMA channelsGeert Uytterhoeven1-3/+2
According to Technical Update TN-RCT-S0352A/E, MSIOF1 DMA can only be used with SYS-DMAC0 on R-Car E3. Fixes: 62c0056f1c3eb15d ("arm64: dts: renesas: r8a774c0: Add MSIOF nodes") Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/20200917132117.8515-3-geert+renesas@glider.be
2020-09-11arm64: dts: renesas: Fix pin controller node namesGeert Uytterhoeven1-1/+1
According to Devicetree Specification v0.2 and later, Section "Generic Names Recommendation", the node name for a pin controller device node should be "pinctrl". Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se> Link: https://lore.kernel.org/r/20200821112433.5652-1-geert+renesas@glider.be
2020-08-25arm64: dts: renesas: r8a774c0: Add PCIe EP nodeLad Prabhakar1-0/+19
Add PCIe EP node to R8A774C0 (RZ/G2E) SoC dtsi. Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Reviewed-by: Biju Das <biju.das.jz@bp.renesas.com> Link: https://lore.kernel.org/r/20200814173037.17822-6-prabhakar.mahadev-lad.rj@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2020-07-17arm64: dts: renesas: Fix SD Card/eMMC interface device node namesYoshihiro Shimoda1-3/+3
Fix the device node names as "mmc@". Fixes: 663386c3e1aa ("arm64: dts: renesas: r8a774a1: Add SDHI nodes") Fixes: 9b33e3001b67 ("arm64: dts: renesas: Initial r8a774b1 SoC device tree") Fixes: 77223211f44d ("arm64: dts: renesas: r8a774c0: Add SDHI nodes") Fixes: d9d67010e0c6 ("arm64: dts: r8a7795: Add SDHI support to dtsi") Fixes: a513cf1e6457 ("arm64: dts: r8a7796: add SDHI nodes") Fixes: 111cc9ace2b5 ("arm64: dts: renesas: r8a77961: Add SDHI nodes") Fixes: f51746ad7d1f ("arm64: dts: renesas: Add Renesas R8A77961 SoC support") Fixes: df863d6f95f5 ("arm64: dts: renesas: initial R8A77965 SoC device tree") Fixes: 9aa3558a02f0 ("arm64: dts: renesas: ebisu: Add and enable SDHI device nodes") Fixes: 83f18749c2f6 ("arm64: dts: renesas: r8a77995: Add SDHI (MMC) support") Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Link: https://lore.kernel.org/r/1594382634-13714-1-git-send-email-yoshihiro.shimoda.uh@renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2020-04-27arm64: dts: renesas: Fix IOMMU device node namesYoshihiro Shimoda1-9/+9
Fix IOMMU device node names as "iommu@". Fixes: 8f507babc617 ("arm64: dts: renesas: r8a774a1: Add IPMMU device nodes") Fixes: 63093a8e58be ("arm64: dts: renesas: r8a774b1: Add IPMMU device nodes") Fixes: 6c7e02178e8f ("arm64: dts: renesas: r8a774c0: Add IPMMU device nodes") Fixes: 3b7e7848f0e8 ("arm64: dts: renesas: r8a7795: Add IPMMU device nodes") Fixes: e4b9a493df45 ("arm64: dts: renesas: r8a7795-es1: Add IPMMU device nodes") Fixes: 389baa409617 ("arm64: dts: renesas: r8a7796: Add IPMMU device nodes") Fixes: 55697cbb44e4 ("arm64: dts: renesas: r8a779{65,80,90}: Add IPMMU devices nodes") Fixes: ce3b52a1595b ("arm64: dts: renesas: r8a77970: Add IPMMU device nodes") Fixes: a3901e7398e1 ("arm64: dts: renesas: r8a77995: Add IPMMU device nodes") Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se> Link: https://lore.kernel.org/r/1587461775-13369-1-git-send-email-yoshihiro.shimoda.uh@renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2020-02-21arm64: dts: renesas: rzg2: Add reset control properties for displayGeert Uytterhoeven1-2/+3
Add reset control properties to the device nodes for the Display Units on all supported RZ/G2 SoCs. Note that on these SoCs, there is only a single reset for each pair of DU channels. Join the clocks lines while at it, to increase uniformity. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Link: https://lore.kernel.org/r/20200218133019.22299-5-geert+renesas@glider.be
2020-02-21arm64: dts: renesas: rcar-gen3: Replace "vsps" by "renesas,vsps"Geert Uytterhoeven1-1/+2
The Renesas-specific "vsps" property lacks a vendor prefix. Add a "renesas," prefix to comply with DT best practises. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Link: https://lore.kernel.org/r/20191105183504.21447-4-geert+renesas@glider.be
2019-12-20arm64: dts: renesas: Group tuples in pci ranges and dma-ranges propertiesGeert Uytterhoeven1-4/+4
To improve human readability and enable automatic validation, the tuples in the "ranges" and "dma-ranges" properties of PCI device nodes should be grouped. Fix this by grouping the tuples of the "ranges" and "dma-ranges" properties using angle brackets. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/20191213164115.3697-8-geert+renesas@glider.be Reviewed-by: Ulrich Hecht <uli+renesas@fpond.eu>
2019-12-20arm64: dts: renesas: Group tuples in interrupt propertiesGeert Uytterhoeven1-78/+78
To improve human readability and enable automatic validation, the tuples in the various properties containing interrupt specifiers should be grouped. While "make dtbs_check" does not impose this yet for the "interrupts" property, it does for the "interrupt-map" property. Fix this by grouping the tuples of the "interrupts" and "interrupt-map" properties using angle brackets. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/20191213164115.3697-7-geert+renesas@glider.be Reviewed-by: Ulrich Hecht <uli+renesas@fpond.eu>
2019-10-01arm64: dts: renesas: r8a774c0: Add dynamic power coefficientBiju Das1-0/+1
Describe the dynamic power coefficient of A53 CPUs. Based on work by Gaku Inami <gaku.inami.xw@bp.renesas.com> and others. Signed-off-by: Biju Das <biju.das@bp.renesas.com> Reviewed-by: Simon Horman <horms+renesas@verge.net.au> Link: https://lore.kernel.org/r/1568364608-46548-2-git-send-email-biju.das@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2019-10-01arm64: dts: renesas: r8a774c0: Create thermal zone to support IPABiju Das1-3/+16
Setup a thermal zone driven by SoC temperature sensor. Create passive trip points and bind them to CPUFreq cooling device that supports power extension. Based on the work done by Dien Pham <dien.pham.ry@renesas.com> and others for r8a77990 SoC. Signed-off-by: Biju Das <biju.das@bp.renesas.com> Reviewed-by: Simon Horman <horms+renesas@verge.net.au> Link: https://lore.kernel.org/r/1568364608-46548-1-git-send-email-biju.das@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2019-08-21arm64: dts: renesas: Update 'vsps' properties for readabilityJacopo Mondi1-1/+1
Update the 'vsps' property in the R-Car Gen3 SoC device tree files to match what's in the documentation example. Signed-off-by: Jacopo Mondi <jacopo+renesas@jmondi.org> Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Reviewed-by: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2019-08-21arm64: dts: renesas: r8a774c0: Fix register range of display nodeGeert Uytterhoeven1-1/+1
Since the R8A774C0 SoC uses DU{0,1} only, the register block length should be 0x40000. Based on commit 06585ed38b6698bc ("arm64: dts: renesas: r8a77990: Fix register range of display node") for R-Car E3. Fixes: 8ed3a6b223159df3 ("arm64: dts: renesas: r8a774c0: Add display output support") Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com> Reviewed-by: Simon Horman <horms+renesas@verge.net.au>
2019-08-21arm64: dts: renesas: r8a774c0: Sort nodesYoshihiro Kaneko1-45/+45
Sort nodes. If node address is present * Sort by node address, grouping all nodes with the same compat string and sorting the group alphabetically. Else * Sort alphabetically This should not have any run-time effect. Signed-off-by: Yoshihiro Kaneko <ykaneko0929@gmail.com> Reviewed-by: Simon Horman <horms+renesas@verge.net.au> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2019-08-05arm64: dts: renesas: r8a774c0: Point LVDS0 to its companion LVDS1Fabrizio Castro1-0/+2
Add the new renesas,companion property to the LVDS0 node to point to the companion LVDS encoder LVDS1. Based on similar work from Laurent Pinchart for the r8a7799[05]. Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com> Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2019-07-29arm64: dts: renesas: r8a774c0: Add missing assigned-clocks for CAN[01]Fabrizio Castro1-0/+4
Define "assigned-clocks" and "assigned-clock-rates" properties for CAN[01] DT nodes, as required by the dt-bindings. Fixes: 036bc85c1d06ef0a ("arm64: dts: renesas: r8a774c0: Add clkp2 clock to CAN nodes") Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com> Reviewed-by: Chris Paterson <Chris.Paterson2@renesas.com> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2019-06-06arm64: dts: renesas: Revise usb2_phy nodes and phys propertiesYoshihiro Shimoda1-4/+4
Since the commit 233da2c9ec22 ("dt-bindings: phy: rcar-gen3-phy-usb2: Revise #phy-cells property") revised the #phy-cells, this patch follows the updated document for R-Car Gen3 and RZ/A2 SoCs. Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2019-06-06arm64: dts: renesas: r8a774c0: Clean up CPU compatiblesRobin Murphy1-2/+2
Apparently this DTS crossed over with commit 31af04cd60d3 ("arm64: dts: Remove inconsistent use of 'arm,armv8' compatible string") and missed out on the cleanup, so put it right. Signed-off-by: Robin Murphy <robin.murphy@arm.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2019-04-28Merge tag 'renesas-arm64-dt-for-v5.2' of ↵Olof Johansson1-8/+36
https://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into arm/dt Renesas ARM64 Based SoC DT Updates for v5.2 * R-Car Gen3 SoC based Salvator-X and Salvator-XS boards - Add GPIO keys support - Sort rwdt node alphabetically * R-Car H3 (r8a7795), M3-W (r8a7796) and M3-N (r8a77965) SoCs - Use extended audio DMAC register * R-Car M3-W (r8a7796) SoC - Remove unneeded sound #address/size-cells * R-Car M3-N (r8a77965) SoC - Add SSIU support for audio * R-Car E3 (r8a77990) and RZ/G2E (r8a774c0) SoCs - Remove invalid compatible value for CSI40 * R-Car E3 (r8a77990) SoC - Cprrect SPDX license identifier style * R-Car E3 (r8a77990) based Ebisu board - Add BD9571 PMIC with DDR0 backup power config - Correct adv7482 hexadecimal register address - Add GPIO expander * R-Car E3 (r8a77990) based Ebisu and D3 (r8a77995) based Draak boards - Update bootargs to bring them into line with other R-Car Gen3 boards - Enable LVDS1 encoder * R-Car D3 (r8a77995) based Draak board - Correct EthernetAVB phy mode - Enable CAN0 and CAN1 * RZ/G2E (r8a774c0) SoC - Add CANFD support - Correct CPU node style * RZ/G2E (r8a774c0) and RZ/G2M (r8a774a1) SoCs - Add clkp2 clock to CAN nodes * RZ/G2E (r8a774c0) based EK874 board - Add LED, CAN and RTC support * tag 'renesas-arm64-dt-for-v5.2' of https://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas: (26 commits) arm64: dts: renesas: salvator-common: Add GPIO keys support arm64: dts: renesas: use extended audio dmac register arm64: dts: renesas: r8a77995: draak: Fix EthernetAVB phy mode to rgmii arm64: dts: renesas: salvator-common: Sort node label arm64: dts: renesas: Update Ebisu and Draak bootargs arm64: dts: renesas: r8a774c0: Add clkp2 clock to CAN nodes arm64: dts: renesas: r8a774c0: Add CANFD support arm64: dts: renesas: r8a774a1: Add clkp2 clock to CAN nodes arm64: dts: renesas: ebisu: Add PMIC DDR0 Backup Power config arm64: dts: renesas: r8a77990-ebisu: Add BD9571 PMIC arm64: dts: renesas: r8a77990: Remove invalid compatible value for CSI40 arm64: dts: renesas: r8a774c0: Remove invalid compatible value for CSI40 arm64: dts: renesas: r8a77995: draak: Enable CAN0, CAN1 arm64: dts: renesas: r8a774c0-cat874: Add RWDT support arm64: dts: renesas: ebisu: Enable VIN5 arm64: dts: renesas: r8a774c0-cat874: Add LEDs support arm64: dts: renesas: r8a774c0-cat874: add RTC support arm64: dts: renesas: cat875: Add CAN support arm64: dts: renesas: r8a774c0: Fix cpu nodes style arm64: dts: renesas: r8a77965: add SSIU support for sound ... Signed-off-by: Olof Johansson <olof@lixom.net>
2019-03-25Merge tag 'renesas-fixes-for-v5.1' of ↵Arnd Bergmann1-4/+3
git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into arm/fixes Renesas ARM Based SoC Fixes for v5.1 R-Car Gen3 E3 (r8a77990) and RZ/G2E (r8a774c0) SoCs: * Correct SCIF5 DMA channels * tag 'renesas-fixes-for-v5.1' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas: arm64: dts: renesas: r8a774c0: Fix SCIF5 DMA channels arm64: dts: renesas: r8a77990: Fix SCIF5 DMA channels
2019-03-19arm64: dts: renesas: r8a774c0: Add clkp2 clock to CAN nodesFabrizio Castro1-4/+8
According to the latest information, clkp2 is available on RZ/G2. Modify CAN0 and CAN1 nodes accordingly. Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com> Reviewed-by: Chris Paterson <Chris.Paterson2@renesas.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2019-03-19arm64: dts: renesas: r8a774c0: Add CANFD supportFabrizio Castro1-0/+25
The CANFD implementation on the RZ/G2E (a.k.a. r8a774c0) is identical to the one found on the r8a77990. Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2019-03-18arm64: dts: renesas: r8a774c0: Remove invalid compatible value for CSI40Niklas Söderlund1-2/+1
The compatible value renesas,rcar-gen3-csi2 was used while prototyping the R-Car CSI-2 driver but was removed before the driver was merged. Fixes: e961ab42e034d469 ("arm64: dts: renesas: r8a774c0: Add VIN and CSI-2 device nodes") Signed-off-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2019-03-18arm64: dts: renesas: r8a774c0: Fix cpu nodes styleFabrizio Castro1-2/+2
We usually leave a space between "=" and the value of device tree properties, but unfortunately that was overlooked for the "clocks" property of cpu@0 and cpu@1. This patch fixes the spacing with the "clocks" property of cpu@0 and cpu@1. Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2019-02-25arm64: dts: renesas: r8a774c0: Fix SCIF5 DMA channelsGeert Uytterhoeven1-4/+3
Correct the DMA channels for SCIF5 from 16..47 to 0..15, as was done for R-Car E3. Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com> Fixes: 2660a6af690ebbb4 ("arm64: dts: renesas: r8a774c0: Add SCIF and HSCIF nodes") Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2019-02-08arm64: dts: renesas: r8a774c0: Add TMU device nodesBiju Das1-0/+65
This patch adds TMU{0|1|2|3|4} device nodes for r8a774c0 SoC. Signed-off-by: Biju Das <biju.das@bp.renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2019-02-08arm64: dts: renesas: r8a774c0: Add CMT device nodesBiju Das1-0/+70
This patch adds CMT{0|1|2|3} device nodes for r8a774c0 SoC. Signed-off-by: Biju Das <biju.das@bp.renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2019-02-08arm64: dts: renesas: r8a774c0: Add OPPs table for cpu devicesFabrizio Castro1-0/+25
This patch defines OOP tables for all CPUs, similarly to what done by Takeshi Kihara and Yoshihiro Kaneko for the R8A77990. Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2019-01-23arm64: dts: renesas: r8a774c0: Enable DMA for SCIF2Geert Uytterhoeven1-0/+3
SCIF2 on RZ/G2E can be used with both DMAC1 and DMAC2. Fixes: 1b24f9e8ea3ff95f ("arm64: dts: renesas: r8a774c0: Add SCIF and HSCIF nodes") Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2019-01-22arm64: dts: renesas: r8a774c0: Add VIN and CSI-2 device nodesFabrizio Castro1-0/+88
Add device nodes for VIN4, VIN5 and CSI40 to RZ/G2E (a.k.a. R8A774C0) SoC specific device tree. Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2019-01-22arm64: dts: renesas: r8a774c0: Add PCIe device nodeFabrizio Castro1-0/+27
This patch adds PCI express channel 0 device tree node to the RZ/G2E (a.k.a. R8A774C0) SoC dtsi. Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2019-01-22arm64: dts: renesas: r8a774c0: Connect RZ/G2E Audio-DMAC to IPMMUFabrizio Castro1-0/+8
Hook up the RZ/G2E Audio-DMAC device to IPMMU-MP as stated by the RZ/G2 User's manual. Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2019-01-22arm64: dts: renesas: r8a774c0: Connect RZ/G2E AVB to IPMMUFabrizio Castro1-0/+1
Hook up the RZ/G2E AVB device to IPMMU-DS0 as stated by the RZ/G2 User's manual. Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2019-01-22arm64: dts: renesas: r8a774c0: Connect RZ/G2E SYS-DMAC to IPMMUFabrizio Castro1-0/+24
Hook up SYS-DMAC0, SYS-DMAC1, and SYS-DMAC2 to IPMMU-DS0 and IPMMU-DS1, according to what reported by the RZ/G2 User's manual. Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2019-01-22arm64: dts: renesas: r8a774c0: Add USB3.0 device nodesFabrizio Castro1-0/+22
Add usb3.0 host and function device nodes to the RZ/G2E SoC dtsi. Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
generated by cgit v1.2.3 (git 2.39.0) at 2024-07-18 18:55:17 +0300