diff options
| author | Codrin Ciubotariu <codrin.ciubotariu@microchip.com> | 2022-03-04 21:26:16 +0300 |
|---|---|---|
| committer | Nicolas Ferre <nicolas.ferre@microchip.com> | 2022-03-08 17:35:35 +0300 |
| commit | 1a944729d8635fa59638f24e8727d5ccaa0c8c19 (patch) | |
| tree | 69000ad631b27030be93d0e1eaccfa733f6d6a81 /drivers/clk/at91/sama7g5.c | |
| parent | a5ab04af49434aef532bf6cd4baa08a13665d608 (diff) | |
| download | linux-1a944729d8635fa59638f24e8727d5ccaa0c8c19.tar.xz | |
clk: at91: sama7g5: fix parents of PDMCs' GCLK
Audio PLL can be used as parent by the GCLKs of PDMCs.
Fixes: cb783bbbcf54 ("clk: at91: sama7g5: add clock support for sama7g5")
Signed-off-by: Codrin Ciubotariu <codrin.ciubotariu@microchip.com>
Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
Link: https://lore.kernel.org/r/20220304182616.1920392-1-codrin.ciubotariu@microchip.com
Diffstat (limited to 'drivers/clk/at91/sama7g5.c')
| -rw-r--r-- | drivers/clk/at91/sama7g5.c | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/drivers/clk/at91/sama7g5.c b/drivers/clk/at91/sama7g5.c index e43458673afb..9a213ba9e58b 100644 --- a/drivers/clk/at91/sama7g5.c +++ b/drivers/clk/at91/sama7g5.c @@ -699,16 +699,16 @@ static const struct { { .n = "pdmc0_gclk", .id = 68, .r = { .max = 50000000 }, - .pp = { "syspll_divpmcck", "baudpll_divpmcck", }, - .pp_mux_table = { 5, 8, }, + .pp = { "syspll_divpmcck", "audiopll_divpmcck", }, + .pp_mux_table = { 5, 9, }, .pp_count = 2, .pp_chg_id = INT_MIN, }, { .n = "pdmc1_gclk", .id = 69, .r = { .max = 50000000, }, - .pp = { "syspll_divpmcck", "baudpll_divpmcck", }, - .pp_mux_table = { 5, 8, }, + .pp = { "syspll_divpmcck", "audiopll_divpmcck", }, + .pp_mux_table = { 5, 9, }, .pp_count = 2, .pp_chg_id = INT_MIN, }, |