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author | Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com> | 2023-08-17 23:18:26 +0300 |
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committer | Rodrigo Vivi <rodrigo.vivi@intel.com> | 2023-12-21 19:40:20 +0300 |
commit | 296549107e4766bb927debd016527c71fb6faf36 (patch) | |
tree | 93b8b6ac4a73a64f92a25c5f3faeadb17869bb68 /drivers/gpu/drm/xe/xe_hw_engine_types.h | |
parent | 0b1d1473b355ff3a1447048db24822eb7016c1c2 (diff) | |
download | linux-296549107e4766bb927debd016527c71fb6faf36.tar.xz |
drm/xe: base definitions for the GSCCS
The first step in introducing the GSCCS is to add all the basic defs for
it (name, mmio base, class/instance, lrc size etc).
Bspec: 60149, 60421, 63752
Signed-off-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
Reviewed-by: Matt Roper <matthew.d.roper@intel.com>
Link: https://lore.kernel.org/r/20230817201831.1583172-3-daniele.ceraolospurio@intel.com
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Diffstat (limited to 'drivers/gpu/drm/xe/xe_hw_engine_types.h')
-rw-r--r-- | drivers/gpu/drm/xe/xe_hw_engine_types.h | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/drivers/gpu/drm/xe/xe_hw_engine_types.h b/drivers/gpu/drm/xe/xe_hw_engine_types.h index 97d9ba31b5fc..cd4bc1412a3f 100644 --- a/drivers/gpu/drm/xe/xe_hw_engine_types.h +++ b/drivers/gpu/drm/xe/xe_hw_engine_types.h @@ -53,6 +53,8 @@ enum xe_hw_engine_id { XE_HW_ENGINE_CCS2, XE_HW_ENGINE_CCS3, #define XE_HW_ENGINE_CCS_MASK GENMASK_ULL(XE_HW_ENGINE_CCS3, XE_HW_ENGINE_CCS0) + XE_HW_ENGINE_GSCCS0, +#define XE_HW_ENGINE_GSCCS_MASK GENMASK_ULL(XE_HW_ENGINE_GSCCS0, XE_HW_ENGINE_GSCCS0) XE_NUM_HW_ENGINES, }; |