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2024-05-13Merge branches 'arm/renesas', 'arm/smmu', 'x86/amd', 'core' and 'x86/vt-d' ↵Joerg Roedel2-0/+70
into next
2024-04-26dt-bindings: iommu: renesas,ipmmu-vmsa: add r8a779h0 supportThanh Le1-0/+1
Document support for the I/O Memory Management Unit (IPMMU) on the Renesas R-Car V4M (R8A779H0) SoC. Signed-off-by: Thanh Le <thanh.le.xv@renesas.com> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Acked-by: Rob Herring (Arm) <robh@kernel.org> Link: https://lore.kernel.org/r/13643259be4e8a8e30632de622ad7c685dbb7c61.1713526852.git.geert+renesas@glider.be Signed-off-by: Joerg Roedel <jroedel@suse.de>
2024-04-18dt-bindings: iommu: Add Qualcomm TBUGeorgi Djakov1-0/+69
The "apps_smmu" on the Qualcomm sdm845 platform is an implementation of the SMMU-500, that consists of a single TCU (Translation Control Unit) and multiple TBUs (Translation Buffer Units). These TBUs have hardware debugging features that are specific and only present on Qualcomm hardware. Represent them as independent DT nodes. List all the resources that are needed to operate them (such as registers, clocks, power domains and interconnects). Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Georgi Djakov <quic_c_gdjako@quicinc.com> Link: https://lore.kernel.org/r/20240417133731.2055383-2-quic_c_gdjako@quicinc.com Signed-off-by: Will Deacon <will@kernel.org>
2024-02-22dt-bindings: arm-smmu: Document SM8650 GPU SMMUNeil Armstrong1-2/+4
Document the GPU SMMU found on the SM8650 platform. Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20240216-topic-sm8650-gpu-v3-3-eb1f4b86d8d3@linaro.org Signed-off-by: Will Deacon <will@kernel.org>
2024-02-22dt-bindings: arm-smmu: Fix SM8[45]50 GPU SMMU 'if' conditionNeil Armstrong1-2/+11
The 'if' condition for the SM8[45]50 GPU SMMU is too large, add the other compatible strings to the condition to only allow the clocks for the GPU SMMU nodes. Fixes: 4fff78dc2490 ("dt-bindings: arm-smmu: Document SM8[45]50 GPU SMMU") Suggested-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20240216-topic-sm8650-gpu-v3-2-eb1f4b86d8d3@linaro.org Signed-off-by: Will Deacon <will@kernel.org>
2024-02-22dt-bindings: arm-smmu: Add QCM2290 GPU SMMUKonrad Dybcio1-1/+2
The GPU SMMU on QCM2290 nicely fits into the description we already have for SM61[12]5. Add it. Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> Link: https://lore.kernel.org/r/20240219-topic-rb1_gpu-v1-1-d260fa854707@linaro.org Signed-off-by: Will Deacon <will@kernel.org>
2024-01-03Merge branches 'apple/dart', 'arm/rockchip', 'arm/smmu', 'virtio', ↵Joerg Roedel3-6/+83
'x86/vt-d', 'x86/amd' and 'core' into next
2023-12-15dt-bindings: iommu: rockchip: Add Rockchip RK3588Andy Yan1-3/+8
Add a Rockchip RK3588 compatible I split it from the vop2 patch series as suggested by Heiko[0] Signed-off-by: Andy Yan <andy.yan@rock-chips.com> Reviewed-by: Heiko Stuebner <heiko@sntech.de> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> [0]https://patchwork.kernel.org/project/dri-devel/patch/20231207080235.652719-1-andyshrk@163.com/ Link: https://lore.kernel.org/r/20231212005710.1837066-1-andyshrk@163.com Signed-off-by: Joerg Roedel <jroedel@suse.de>
2023-12-12dt-bindings: arm-smmu: Document SM8[45]50 GPU SMMUKonrad Dybcio1-2/+46
SM8450 and SM8550 both use a Qualcomm-modified MMU500 for their GPU. In both cases, it requires a set of clocks to be enabled. Describe that. Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> Link: https://lore.kernel.org/r/20231127-topic-a7xx_dt-v2-1-2a437588e563@linaro.org Signed-off-by: Will Deacon <will@kernel.org>
2023-12-12dt-bindings: arm-smmu: Add compatible for X1E80100 SoCRajendra Nayak1-0/+2
Add the SoC specific compatible for X1E80100 implementing arm,mmu-500. Signed-off-by: Rajendra Nayak <quic_rjendra@quicinc.com> Co-developed-by: Sibi Sankar <quic_sibis@quicinc.com> Signed-off-by: Sibi Sankar <quic_sibis@quicinc.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20231124100608.29964-3-quic_sibis@quicinc.com Signed-off-by: Will Deacon <will@kernel.org>
2023-12-12dt-bindings: iommu: arm,smmu: document the SM8650 System MMUNeil Armstrong1-0/+2
Document the System MMU on the SM8650 Platform. Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org> Link: https://lore.kernel.org/r/20231128-topic-sm8650-upstream-bindings-smmu-v2-1-d3fbcaf1ea92@linaro.org Signed-off-by: Will Deacon <will@kernel.org>
2023-12-12dt-bindings: iommu: arm,smmu: document clocks for the SM8350 GPU SMMUKrzysztof Kozlowski1-1/+24
Document the clocks for Qualcomm SM8350 Adreno GPU SMMU, already used in DTS: sm8350-hdk.dtb: iommu@3da0000: clock-names: False schema does not allow ['bus', 'iface', 'ahb', 'hlos1_vote_gpu_smmu', 'cx_gmu', 'hub_cx_int', 'hub_aon'] Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Acked-by: Conor Dooley <conor.dooley@microchip.com> Link: https://lore.kernel.org/r/20231112184522.3759-1-krzysztof.kozlowski@linaro.org Signed-off-by: Will Deacon <will@kernel.org>
2023-11-27dt-bindings: iommu: dart: Add t8103-usb4-dart compatibleSven Peter1-0/+1
This DART variant is found in the t8103 (M1) SoCs and used for the USB4/Thunderbolt PCIe ports. Unlike the regular t8103 DART these support up to 64 SIDs and require a slightly different MMIO layout. Acked-by: Hector Martin <marcan@marcan.st> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Sven Peter <sven@svenpeter.dev> Link: https://lore.kernel.org/r/20231126151701.16534-2-sven@svenpeter.dev Signed-off-by: Joerg Roedel <jroedel@suse.de>
2023-10-12dt-bindings: arm-smmu: Add SM7150 GPU SMMUv2Danila Tikhonov1-0/+2
SM7150 has a qcom,smmu-v2-style SMMU just for Adreno and friends. Document it. Signed-off-by: Danila Tikhonov <danila@jiaxyga.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20230913184526.20016-2-danila@jiaxyga.com Signed-off-by: Will Deacon <will@kernel.org>
2023-09-18dt-bindings: arm-smmu: Fix SDM630 clocks descriptionKonrad Dybcio1-1/+1
SDM630 was abusingly referencing one of the internal bus clocks, that were recently dropped from Linux (because the original implementation did not make much sense), circumventing the interconnect framework. Fix it by dropping the bus-mm clock (which requires separating 630 from similar entries) and keeping the rest as-is. Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> Link: https://lore.kernel.org/r/20230721-topic-rpm_clk_cleanup-v2-4-1e506593b1bd@linaro.org Signed-off-by: Will Deacon <will@kernel.org>
2023-09-02Merge tag 'iommu-updates-v6.6' of ↵Linus Torvalds3-6/+69
git://git.kernel.org/pub/scm/linux/kernel/git/joro/iommu Pull iommu updates from Joerg Roedel: "Core changes: - Consolidate probe_device path - Make the PCI-SAC IOVA allocation trick PCI-only AMD IOMMU: - Consolidate PPR log handling - Interrupt handling improvements - Refcount fixes for amd_iommu_v2 driver Intel VT-d driver: - Enable idxd device DMA with pasid through iommu dma ops - Lift RESV_DIRECT check from VT-d driver to core - Miscellaneous cleanups and fixes ARM-SMMU drivers: - Device-tree binding updates: - Add additional compatible strings for Qualcomm SoCs - Allow ASIDs to be configured in the DT to work around Qualcomm's broken hypervisor - Fix clocks for Qualcomm's MSM8998 SoC - SMMUv2: - Support for Qualcomm's legacy firmware implementation featured on at least MSM8956 and MSM8976 - Match compatible strings for Qualcomm SM6350 and SM6375 SoC variants - SMMUv3: - Use 'ida' instead of a bitmap for VMID allocation - Rockchip IOMMU: - Lift page-table allocation restrictions on newer hardware - Mediatek IOMMU: - Add MT8188 IOMMU Support - Renesas IOMMU: - Allow PCIe devices .. and the usual set of cleanups an smaller fixes" * tag 'iommu-updates-v6.6' of git://git.kernel.org/pub/scm/linux/kernel/git/joro/iommu: (64 commits) iommu: Explicitly include correct DT includes iommu/amd: Remove unused declarations iommu/arm-smmu-qcom: Add SM6375 SMMUv2 iommu/arm-smmu-qcom: Add SM6350 DPU compatible iommu/arm-smmu-qcom: Add SM6375 DPU compatible iommu/arm-smmu-qcom: Sort the compatible list alphabetically dt-bindings: arm-smmu: Fix MSM8998 clocks description iommu/vt-d: Remove unused extern declaration dmar_parse_dev_scope() iommu/vt-d: Fix to convert mm pfn to dma pfn iommu/vt-d: Fix to flush cache of PASID directory table iommu/vt-d: Remove rmrr check in domain attaching device path iommu: Prevent RESV_DIRECT devices from blocking domains dmaengine/idxd: Re-enable kernel workqueue under DMA API iommu/vt-d: Add set_dev_pasid callback for dma domain iommu/vt-d: Prepare for set_dev_pasid callback iommu/vt-d: Make prq draining code generic iommu/vt-d: Remove pasid_mutex iommu/vt-d: Add domain_flush_pasid_iotlb() iommu: Move global PASID allocation from SVA to core iommu: Generalize PASID 0 for normal DMA w/o PASID ...
2023-08-23dt-bindings: use capital "OR" for multiple licenses in SPDXKrzysztof Kozlowski1-1/+1
Documentation/process/license-rules.rst and checkpatch expect the SPDX identifier syntax for multiple licenses to use capital "OR". Correct it to keep consistent format and avoid copy-paste issues. Correct also the format // -> .* in few Allwinner binding headers as pointed out by checkpatch: WARNING: Improper SPDX comment style for 'include/dt-bindings/reset/sun50i-h6-ccu.h', please use '/*' instead Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Acked-by: Guenter Roeck <linux@roeck-us.net> Acked-by: Stephen Boyd <sboyd@kernel.org> Link: https://lore.kernel.org/r/20230823084540.112602-1-krzysztof.kozlowski@linaro.org Signed-off-by: Rob Herring <robh@kernel.org>
2023-08-21Merge branches 'apple/dart', 'arm/mediatek', 'arm/renesas', 'arm/rockchip', ↵Joerg Roedel3-6/+69
'arm/smmu', 'unisoc', 'x86/vt-d', 'x86/amd' and 'core' into next
2023-08-11dt-bindings: arm-smmu: Fix MSM8998 clocks descriptionKonrad Dybcio1-0/+41
MSM8998 was abusingly referencing one of the internal bus clocks, that were recently dropped from Linux (because the original implementation did not make much sense), circumventing the interconnect framework. Fix it by dropping the bus-mm clock (which requires separating 8998 from similar entries) and keeping the rest as-is. Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> Link: https://lore.kernel.org/r/20230531-topic-8998_mmssclk-v3-6-ba1b1fd9ee75@linaro.org Signed-off-by: Will Deacon <will@kernel.org>
2023-08-09dt-bindings: iommu: qcom,iommu: Add QSMMUv2 and MSM8976 compatiblesAngeloGioacchino Del Regno1-5/+12
Add compatible string "qcom,msm-iommu-v2" for the inner node, along with "qcom,msm8976-iommu" as a first user of it and "qcom,msm-iommu-v2-ns" and "qcom,msm-iommu-v2-sec" for the context bank nodes to support Qualcomm's secure fw "SMMU v2" implementation. Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Reviewed-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20230622092742.74819-6-angelogioacchino.delregno@collabora.com Signed-off-by: Will Deacon <will@kernel.org>
2023-08-09dt-bindings: iommu: qcom,iommu: Add qcom,ctx-asid propertyAngeloGioacchino Del Regno1-0/+5
Add a new "qcom,ctx-asid" property to force an ASID number on IOMMU contexts where required. Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Reviewed-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20230622092742.74819-2-angelogioacchino.delregno@collabora.com Signed-off-by: Will Deacon <will@kernel.org>
2023-08-07dt-bindings: mediatek: mt8188: Add binding for MM & INFRA IOMMUChengci.Xu1-1/+11
Add descriptions for mt8188 IOMMU which also use ARM Short-Descriptor translation table format. In mt8188, there are two smi-common HW and IOMMU, one is for vdo(video output), the other is for vpp(video processing pipe). They connects with different smi-larbs, then some setting(larbid_remap) is different. Differentiate them with the compatible string. Something like this: IOMMU(VDO) IOMMU(VPP) | | SMI_COMMON_VDO SMI_COMMON_VPP --------------- ---------------- | | ... | | ... larb0 larb2 ... larb1 larb3 ... We also have an IOMMU that is for infra master like PCIe. And infra master don't have the larb and ports. Signed-off-by: Chengci.Xu <chengci.xu@mediatek.com> Signed-off-by: Yong Wu <yong.wu@mediatek.com> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20230602090227.7264-2-yong.wu@mediatek.com Signed-off-by: Joerg Roedel <jroedel@suse.de>
2023-06-05dt-bindings: arm-smmu: Add SDX75 SMMU compatibleRohit Agarwal1-0/+1
Add devicetree binding for Qualcomm SDX75 SMMU. Signed-off-by: Rohit Agarwal <quic_rohiagar@quicinc.com> Acked-by: Conor Dooley <conor.dooley@microchip.com> Link: https://lore.kernel.org/r/1684487350-30476-5-git-send-email-quic_rohiagar@quicinc.com Signed-off-by: Will Deacon <will@kernel.org>
2023-06-05dt-bindings: arm-smmu: Add SM6375 GPU SMMUKonrad Dybcio1-0/+2
SM6375 has a "Qualcomm SMMU V2" implementation for its GPU SMMU. It does not however qualify for the qcom,adreno-smmu compatible, as it can not do split pagetables. It consumes a single clock and a single genpd. Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20230531-topic-sm6375_gpusmmu-v1-1-860943894c71@linaro.org Signed-off-by: Will Deacon <will@kernel.org>
2023-06-05dt-bindings: iommu: arm,smmu: enable clocks for sa8775p Adreno SMMUBartosz Golaszewski1-1/+2
The GPU SMMU will require the clocks property to be set so put the relevant compatible into the adreno if-then block. Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20230417125844.400782-5-brgl@bgdev.pl [will: Fixed conflict with 'qcom,sc8280xp-smmu-500' entry] Signed-off-by: Will Deacon <will@kernel.org>
2023-06-05dt-bindings: arm-smmu: Fix SC8280XP Adreno bindingBjorn Andersson1-2/+4
The qcom,sc8280xp-smmu-500 Adreno SMMU binding has clocks, so fix up the binding to allow this. Fixes: 38db6b41b2f4 ("dt-bindings: arm-smmu: Add compatible for Qualcomm SC8280XP") Signed-off-by: Bjorn Andersson <quic_bjorande@quicinc.com> Acked-by: Conor Dooley <conor.dooley@microchip.com> Link: https://lore.kernel.org/r/20230523010441.63236-1-quic_bjorande@quicinc.com Signed-off-by: Will Deacon <will@kernel.org>
2023-04-30Merge tag 'iommu-updates-v6.4' of ↵Linus Torvalds2-12/+65
git://git.kernel.org/pub/scm/linux/kernel/git/joro/iommu Pull iommu updates from Joerg Roedel: - Convert to platform remove callback returning void - Extend changing default domain to normal group - Intel VT-d updates: - Remove VT-d virtual command interface and IOASID - Allow the VT-d driver to support non-PRI IOPF - Remove PASID supervisor request support - Various small and misc cleanups - ARM SMMU updates: - Device-tree binding updates: * Allow Qualcomm GPU SMMUs to accept relevant clock properties * Document Qualcomm 8550 SoC as implementing an MMU-500 * Favour new "qcom,smmu-500" binding for Adreno SMMUs - Fix S2CR quirk detection on non-architectural Qualcomm SMMU implementations - Acknowledge SMMUv3 PRI queue overflow when consuming events - Document (in a comment) why ATS is disabled for bypass streams - AMD IOMMU updates: - 5-level page-table support - NUMA awareness for memory allocations - Unisoc driver: Support for reattaching an existing domain - Rockchip driver: Add missing set_platform_dma_ops callback - Mediatek driver: Adjust the dma-ranges - Various other small fixes and cleanups * tag 'iommu-updates-v6.4' of git://git.kernel.org/pub/scm/linux/kernel/git/joro/iommu: (82 commits) iommu: Remove iommu_group_get_by_id() iommu: Make iommu_release_device() static iommu/vt-d: Remove BUG_ON in dmar_insert_dev_scope() iommu/vt-d: Remove a useless BUG_ON(dev->is_virtfn) iommu/vt-d: Remove BUG_ON in map/unmap() iommu/vt-d: Remove BUG_ON when domain->pgd is NULL iommu/vt-d: Remove BUG_ON in handling iotlb cache invalidation iommu/vt-d: Remove BUG_ON on checking valid pfn range iommu/vt-d: Make size of operands same in bitwise operations iommu/vt-d: Remove PASID supervisor request support iommu/vt-d: Use non-privileged mode for all PASIDs iommu/vt-d: Remove extern from function prototypes iommu/vt-d: Do not use GFP_ATOMIC when not needed iommu/vt-d: Remove unnecessary checks in iopf disabling path iommu/vt-d: Move PRI handling to IOPF feature path iommu/vt-d: Move pfsid and ats_qdep calculation to device probe path iommu/vt-d: Move iopf code from SVA to IOPF enabling path iommu/vt-d: Allow SVA with device-specific IOPF dmaengine: idxd: Add enable/disable device IOPF feature arm64: dts: mt8186: Add dma-ranges for the parent "soc" node ...
2023-04-27Merge tag 'devicetree-for-6.4-1' of ↵Linus Torvalds2-122/+113
git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux Pull devicetree updates from Rob Herring: "Bindings: - Convert Qcom IOMMU, Amlogic timer, Freescale sec-v4.0, Toshiba TC358764 display bridge, Parade PS8622 display bridge, and Xilinx FPGA bindings to DT schema format - Add qdu1000 and sa8775p SoC support to Qcom PDC interrupt controller - Add MediaTek MT8365 UART and SYSIRQ bindings - Add Arm Cortex-A78C and X1C core compatibles - Add vendor prefix for Novatek - Remove bindings for stih415, sti416, stid127 platforms - Drop uneeded quotes in schema files. This is preparation for yamllint checking quoting for us. - Add missing (unevaluated|additional)Properties constraints on child node schemas - Clean-up schema comments formatting - Fix I2C and SPI node bus names in schema examples - Clean-up some display compatibles schema syntax - Fix incorrect references to lvds.yaml - Gather all cache controller bindings in a common directory DT core: - Convert unittest to new void .remove platform device hook - kerneldoc fixes for DT address of_pci_range_to_resource/ of_address_to_resource functions" * tag 'devicetree-for-6.4-1' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux: (46 commits) dt-bindings: rng: Drop unneeded quotes dt-bindings: arm/soc: mediatek: Drop unneeded quotes dt-bindings: soc: qcom: Drop unneeded quotes dt-bindings: i2c: samsung: Fix 'deprecated' value dt-bindings: display: Fix lvds.yaml references dt-bindings: display: simplify compatibles syntax dt-bindings: display: mediatek: simplify compatibles syntax dt-bindings: drm/bridge: ti-sn65dsi86: Fix the video-interfaces.yaml references dt-bindings: timer: Drop unneeded quotes dt-bindings: interrupt-controller: qcom,pdc: document qcom,qdu1000-pdc dt-bindings: interrupt-controller: qcom-pdc: add compatible for sa8775p dt-bindings: reset: remove stih415/stih416 reset dt-bindings: net: dwmac: sti: remove stih415/sti416/stid127 dt-bindings: irqchip: sti: remove stih415/stih416 and stid127 dt-bindings: iommu: Convert QCOM IOMMU to YAML dt-bindings: irqchip: ti,sci-inta: Add optional power-domains property dt-bindings: Add missing (unevaluated|additional)Properties on child node schemas of: address: Reshuffle to remove forward declarations of: address: Fix documented return value of of_pci_range_to_resource() of: address: Document return value of of_address_to_resource() ...
2023-04-14Merge branches 'iommu/fixes', 'arm/allwinner', 'arm/exynos', 'arm/mediatek', ↵Joerg Roedel2-12/+65
'arm/omap', 'arm/renesas', 'arm/rockchip', 'arm/smmu', 'ppc/pamu', 'unisoc', 'x86/vt-d', 'x86/amd', 'core' and 'platform-remove_new' into next
2023-04-12dt-bindings: iommu: Convert QCOM IOMMU to YAMLKonrad Dybcio2-122/+113
Convert the Qualcomm IOMMU bindings to YAML. Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> Link: https://lore.kernel.org/r/20230406-topic-qciommu-v3-1-aa0e4f018191@linaro.org Signed-off-by: Rob Herring <robh@kernel.org>
2023-03-28dt-bindings: iommu: apple,sart: Add apple,t8112-sart compatible stringJanne Grunau1-3/+7
"apple,t8112-sart" as found on the Apple M2 SoC appears to be SART3 as well. To allow for later discovered incompatibilities use '"apple,t8112-sart", "apple,t6000-sart"' as compatible string. Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Janne Grunau <j@jannau.net> Signed-off-by: Hector Martin <marcan@marcan.st>
2023-03-27dt-bindings: arm-smmu: Document SM61[12]5 GPU SMMUKonrad Dybcio1-2/+26
Both of these SoCs have a Qualcomm MMU500 implementation of SMMU in front of their GPUs that expect 3 clocks. Both of them also have an APPS SMMU that expects no clocks. Remove qcom,sm61[12]5-smmu-500 from the "no clocks" list (intentionally 'breaking' the schema checks of APPS SMMU, as now it *can* accept clocks - with the current structure of this file it would have taken a wastefully-long time to sort this out properly..) and add necessary yaml to describe the clocks required by the GPU SMMUs. Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20230315-topic-kamorta_adrsmmu-v1-1-d1c0dea90bd9@linaro.org Signed-off-by: Will Deacon <will@kernel.org>
2023-03-27dt-bindings: arm-smmu: Add SM8350 Adreno SMMUKonrad Dybcio1-0/+1
Document the Adreno SMMU present on SM8350. Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> Link: https://lore.kernel.org/r/20230313-topic-gpu_smmu_bindings-v3-2-66ab655fbfd5@linaro.org Signed-off-by: Will Deacon <will@kernel.org>
2023-03-27dt-bindings: arm-smmu: Use qcom,smmu compatible for MMU500 adreno SMMUsKonrad Dybcio1-2/+12
qcom,smmu-500 was introduced to prevent people from adding new compatibles for what seems to roughly be the same hardware. Use it for qcom,adreno-smmu-compatible targets as well. While at it, fix the "arm,smmu-500" -> "arm,mmu-500" typo in the comment. Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> Link: https://lore.kernel.org/r/20230313-topic-gpu_smmu_bindings-v3-1-66ab655fbfd5@linaro.org Signed-off-by: Will Deacon <will@kernel.org>
2023-03-27dt-bindings: arm-smmu: Add compatible for SM8550 SoCAbel Vesa1-0/+2
Add the SoC specific compatible for SM8550 implementing arm,mmu-500. Signed-off-by: Abel Vesa <abel.vesa@linaro.org> Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20230207-topic-sm8550-upstream-smmu-bindings-v3-1-cb15a7123cfe@linaro.org Signed-off-by: Will Deacon <will@kernel.org>
2023-03-22dt-bindings: iommu: renesas, ipmmu-vmsa: Update for R-Car Gen4Yoshihiro Shimoda1-8/+24
Since R-Car Gen4 does not have the main IPMMU IMSSTR register, update the bindings to drop the interrupt bit number from the renesas,ipmmu-main property. Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> [geert: Re-add removed items level, add minItems/maxItems constraints] Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20230313124026.954514-1-yoshihiro.shimoda.uh@renesas.com Signed-off-by: Joerg Roedel <jroedel@suse.de>
2023-02-18Merge branches 'apple/dart', 'arm/exynos', 'arm/renesas', 'arm/smmu', ↵Joerg Roedel4-9/+60
'x86/vt-d', 'x86/amd' and 'core' into next
2023-01-25dt-bindings: iommu: renesas,ipmmu-vmsa: add r8a779g0 supportYoshihiro Shimoda1-0/+1
Document the compatible values for the IPMMU-VMSA blocks in the Renesas R-Car V4H (R8A779G0) SoC. Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Link: https://lore.kernel.org/r/20230119131833.1008752-1-yoshihiro.shimoda.uh@renesas.com Signed-off-by: Joerg Roedel <jroedel@suse.de>
2023-01-24dt-bindings: arm-smmu: Fix binding for SDX55 and SDX65Manivannan Sadhasivam1-8/+2
Both SDX55 and SDX66 SoCs are using the Qualcomm version of the SMMU-500 IP. But the binding lists them under the non-qcom implementation which is not correct. So fix the binding by moving these two SoCs under "qcom,smmu-500" implementation. Fixes: 6c84bbd103d8 ("dt-bindings: arm-smmu: Add generic qcom,smmu-500 bindings") Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20230123131931.263024-2-manivannan.sadhasivam@linaro.org Signed-off-by: Will Deacon <will@kernel.org>
2023-01-24dt-bindings: arm-smmu: Document smmu-500 binding for SM6125Martin Botka1-0/+2
Document smmu-500 compatibility with the SM6125 SoC. Signed-off-by: Martin Botka <martin.botka@somainline.org> [Marijn: Move compatible to the new, generic, qcom,smmu-500 list] Signed-off-by: Marijn Suijten <marijn.suijten@somainline.org> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20221222193254.126925-2-marijn.suijten@somainline.org Signed-off-by: Will Deacon <will@kernel.org>
2023-01-24dt-bindings: arm-smmu: document the smmu on Qualcomm SA8775PBartosz Golaszewski1-0/+2
Document the qcom,smmu-500 SMMU on SA8775P platforms. Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20230112154554.442808-1-brgl@bgdev.pl Signed-off-by: Will Deacon <will@kernel.org>
2023-01-24dt-bindings: arm-smmu: disallow clocks when not usedKrzysztof Kozlowski1-0/+28
Disallow clocks for variants other than: 1. SMMUs with platform-specific compatibles which list explicit clocks and clock-names, 2. SMMUs using only generic compatibles, e.g. arm,mmu-500, which have a variable clocks on different implementations. This requires such variants with platform-specific compatible, to explicitly list the clocks or omit them, making the binding more constraint. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Marijn Suijten <marijn.suijten@somainline.org> Acked-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20221222092355.74586-1-krzysztof.kozlowski@linaro.org Signed-off-by: Will Deacon <will@kernel.org>
2023-01-24dt-bindings: iommu: qcom: Add Qualcomm MSM8953 compatibleLuca Weiss1-0/+1
Document the compatible used for IOMMU on the msm8953 SoC. Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Luca Weiss <luca@z3ntu.xyz> Link: https://lore.kernel.org/r/20221105142016.93406-1-luca@z3ntu.xyz Signed-off-by: Will Deacon <will@kernel.org>
2023-01-24dt-bindings: arm-smmu: Add sm8150-smmu-500 to the list of Adreno smmusMarijn Suijten1-0/+1
sm8150 has an smmu-500 specifically for Adreno, where the GPU is allowed to switch pagetables. Document the allowed 3-compatibles for this, similar to sc7280 and sm8250. Signed-off-by: Marijn Suijten <marijn.suijten@somainline.org> Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20221213002626.260267-1-konrad.dybcio@linaro.org Signed-off-by: Will Deacon <will@kernel.org>
2023-01-24dt-bindings: arm-smmu: Allow 3 power domains on SM6375 MMU500Konrad Dybcio1-1/+22
The SMMU on SM6375 requires 3 power domains to be active. Add an appropriate description of that. Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Acked-by: Will Deacon <will@kernel.org> Link: https://lore.kernel.org/r/20221115152727.9736-2-konrad.dybcio@linaro.org Signed-off-by: Will Deacon <will@kernel.org>
2023-01-20dt-bindings: iommu: dart: add t8110 compatibleHector Martin1-0/+1
t600x SoCs use this DART style for the Thunderbolt ports, and t8112 SoCs use them everywhere. Add a compatible for it. No other binding changes necessary. Reviewed-by: Sven Peter <sven@svenpeter.dev> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Hector Martin <marcan@marcan.st> Link: https://lore.kernel.org/r/20230113105029.26654-2-marcan@marcan.st Signed-off-by: Joerg Roedel <jroedel@suse.de>
2022-12-19Merge tag 'iommu-updates-v6.2' of ↵Linus Torvalds2-9/+171
git://git.kernel.org/pub/scm/linux/kernel/git/joro/iommu Pull iommu updates from Joerg Roedel: "Core code: - map/unmap_pages() cleanup - SVA and IOPF refactoring - Clean up and document return codes from device/domain attachment AMD driver: - Rework and extend parsing code for ivrs_ioapic, ivrs_hpet and ivrs_acpihid command line options - Some smaller cleanups Intel driver: - Blocking domain support - Cleanups S390 driver: - Fixes and improvements for attach and aperture handling PAMU driver: - Resource leak fix and cleanup Rockchip driver: - Page table permission bit fix Mediatek driver: - Improve safety from invalid dts input - Smaller fixes and improvements Exynos driver: - Fix driver initialization sequence Sun50i driver: - Remove IOMMU_DOMAIN_IDENTITY as it has not been working forever - Various other fixes" * tag 'iommu-updates-v6.2' of git://git.kernel.org/pub/scm/linux/kernel/git/joro/iommu: (74 commits) iommu/mediatek: Fix forever loop in error handling iommu/mediatek: Fix crash on isr after kexec() iommu/sun50i: Remove IOMMU_DOMAIN_IDENTITY iommu/amd: Fix typo in macro parameter name iommu/mediatek: Remove unused "mapping" member from mtk_iommu_data iommu/mediatek: Improve safety for mediatek,smi property in larb nodes iommu/mediatek: Validate number of phandles associated with "mediatek,larbs" iommu/mediatek: Add error path for loop of mm_dts_parse iommu/mediatek: Use component_match_add iommu/mediatek: Add platform_device_put for recovering the device refcnt iommu/fsl_pamu: Fix resource leak in fsl_pamu_probe() iommu/vt-d: Use real field for indication of first level iommu/vt-d: Remove unnecessary domain_context_mapped() iommu/vt-d: Rename domain_add_dev_info() iommu/vt-d: Rename iommu_disable_dev_iotlb() iommu/vt-d: Add blocking domain support iommu/vt-d: Add device_block_translation() helper iommu/vt-d: Allocate pasid table in device probe path iommu/amd: Check return value of mmu_notifier_register() iommu/amd: Fix pci device refcount leak in ppr_notifier() ...
2022-12-14Merge tag 'devicetree-for-6.2' of ↵Linus Torvalds1-2/+4
git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux Pull devicetree updates from Rob Herring: "DT Bindings: - Various LED binding conversions and clean-ups. Convert the ir-spi-led, pwm-ir-tx, and gpio-ir-tx LED bindings to schemas. Consistently reference LED common.yaml or multi-led schemas and disallow undefined properties. - Convert IDT 89HPESx, pwm-clock, st,stmipid02, Xilinx PCIe hosts, and fsl,imx-fb bindings to schema - Add ata-generic, Broadcom u-boot environment, and dynamic MTD sub-partitions bindings. - Make all SPI based displays reference spi-peripheral-props.yaml - Fix some schema property regex's which should be fixed strings or were missing start/end anchors - Remove 'status' in examples, again... DT Core: - Fix a possible NULL dereference in overlay functions - Fix kexec reading 32-bit "linux,initrd-{start,end}" values (which never worked) - Add of_address_count() helper to count number of 'reg' entries - Support .dtso extension for DT overlay source files. Rename staging and unittest overlay files. - Update dtc to upstream v1.6.1-63-g55778a03df61" * tag 'devicetree-for-6.2' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux: (42 commits) dt-bindings: leds: Add missing references to common LED schema dt-bindings: leds: intel,lgm: Add missing 'led-gpios' property of: overlay: fix null pointer dereferencing in find_dup_cset_node_entry() and find_dup_cset_prop() dt-bindings: lcdif: Fix constraints for imx8mp media: dt-bindings: atmel,isc: Drop unneeded unevaluatedProperties dt-bindings: Drop Jee Heng Sia dt-bindings: thermal: cooling-devices: Add missing cache related properties dt-bindings: leds: irled: ir-spi-led: convert to DT schema dt-bindings: leds: irled: pwm-ir-tx: convert to DT schema dt-bindings: leds: irled: gpio-ir-tx: convert to DT schema dt-bindings: leds: mt6360: rework to match multi-led dt-bindings: leds: lp55xx: rework to match multi-led dt-bindings: leds: lp55xx: switch to preferred 'gpios' suffix dt-bindings: leds: lp55xx: allow label dt-bindings: leds: use unevaluatedProperties for common.yaml dt-bindings: thermal: tsens: Add SM6115 compatible of/kexec: Fix reading 32-bit "linux,initrd-{start,end}" values dt-bindings: display: Convert fsl,imx-fb.txt to dt-schema dt-bindings: Add missing start and/or end of line regex anchors dt-bindings: qcom,pdc: Add missing compatibles ...
2022-12-12Merge branches 'arm/allwinner', 'arm/exynos', 'arm/mediatek', ↵Joerg Roedel2-9/+171
'arm/rockchip', 'arm/smmu', 'ppc/pamu', 's390', 'x86/vt-d', 'x86/amd' and 'core' into next
2022-11-19dt-bindings: iommu: mediatek: add binding documentation for MT8365 SoCFabien Parent1-0/+2
Add IOMMU binding documentation for the MT8365 SoC. Signed-off-by: Fabien Parent <fparent@baylibre.com> Signed-off-by: Markus Schneider-Pargmann <msp@baylibre.com> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Yong Wu <yong.wu@mediatek.com> Signed-off-by: Alexandre Mergnat <amergnat@baylibre.com> Reviewed-by: Matthias Brugger <matthias.bgg@gmail.com> Link: https://lore.kernel.org/r/20221001-iommu-support-v6-1-be4fe8da254b@baylibre.com Signed-off-by: Joerg Roedel <jroedel@suse.de>
generated by cgit v1.2.3 (git 2.39.0) at 2024-07-16 01:50:30 +0300