diff options
| author | Samin Guo <samin.guo@starfivetech.com> | 2022-11-01 11:19:48 +0300 |
|---|---|---|
| committer | Samin Guo <samin.guo@starfivetech.com> | 2022-11-01 13:54:30 +0300 |
| commit | 0dbe3fb0be546f2be7adaee6baf6d550fbba4e26 (patch) | |
| tree | 7f1d5836620b8522a4317dd5627d5fcc5a23973f /arch | |
| parent | bd7deb0588459f36cf774ed58a419a7efbc9d5e4 (diff) | |
| download | u-boot-0dbe3fb0be546f2be7adaee6baf6d550fbba4e26.tar.xz | |
board:starfive:evb: add get_chip_type
Read the chip model from the rgpio3 and setenv "chip_vision"
1: jh7110B
0: JH7110A
defalut: JH7110A
Signed-off-by: Samin Guo <samin.guo@starfivetech.com>
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/riscv/include/asm/arch-jh7110/jh7110-regs.h | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/arch/riscv/include/asm/arch-jh7110/jh7110-regs.h b/arch/riscv/include/asm/arch-jh7110/jh7110-regs.h index 6a2b67bb3c..ad04e8877c 100644 --- a/arch/riscv/include/asm/arch-jh7110/jh7110-regs.h +++ b/arch/riscv/include/asm/arch-jh7110/jh7110-regs.h @@ -15,6 +15,7 @@ #define AON_SYSCON_BASE 0x17010000 #define SYS_CRG_BASE 0x13020000 #define AON_CRG_BASE 0x17000000 +#define AON_IOMUX_BASE 0x17020000 #define STG_CRG_BASE 0x10230000 #define CLK_ENABLE_MASK 0x80000000U #define SYS_CRG_RESET_ASSERT3_SHIFT 0X304U @@ -75,6 +76,7 @@ #define PCIE_USB3_RX_STANDBY_MASK 0x80U #define PCIE_USB3_PHY_ENABLE_SHIFT 0x4U #define PCIE_USB3_PHY_ENABLE_MASK 0x10U +#define AON_GPIO_DIN_REG 0x2c /*timer cfg*/ #define TIMER_CLK_APB_SHIFT 0x1F0U |