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Changelog:
IGPS 04.01.03 - May 29th 2024
============
- TIP_FW 0.7.1 L0 0.6.0 L1
* Add flash protection on recovery image.
Recovery region is now read-only.
* Enable hardening tables:
.\py_scripts\ImageGeneration\inputs\registers\registers_bootblock.csv
.\py_scripts\ImageGeneration\inputs\registers\registers_bl31.csv
- Uboot
* Fix IPv6 PXE boot
- Yocto build
* Updated script for SA pre-signed combo0 support,
just like TIP FW pre-signed combo0.
* Add comment support for settings.
* config_replacer: make comment handler more general
Move comment handler from xml parser to load settings function.
Signed-off-by: Tim Lee <timlee660101@gmail.com>
Change-Id: I23d99e9998b89c3cece4544149ebe48f846e2580
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Changelog:
version 0.4.8 - May 21th 2024
=============
- Set cntfrq_el0 should be after calling serial_printf_init.
- Makefile: move object code to independent path.
version 0.4.7 - May 7th 2024
=============
- Fix DDP\SDP type print.
- Cleanup code for upstream.
- Fix print of reset type for TIP reset case.
- Bug fix: when using dlls_trim_clk override from header option INCR bit
value is set to bit 7 instead of 6. Fixed to 6.
- Add mode non-ECC ranges (8 total).
- Fix build on Linux (change "Apps" folder to "apps").
- Upgrade compiler and compile by default with dwarf-3 (allow debugging
with Lauterbach, for GDB switch to -ggdb).
- Compile optimization for speed.
- Fix Coverity issues.
- Cleanup makefile.
- Add bit (over scratchpad bits): INTCR2.HOST_INIT (bit 11). This bit
indicates host is initialized by bootblock. After host is set bit is set
to prevent re-init.
- Bug fix: cntfrq_el0 was set back to 25000000 after warm boot, regardless
of CPU frequency.
Signed-off-by: Tim Lee <timlee660101@gmail.com>
Change-Id: I5e0f51ce8e3ab55ec4caa244ebcd03cb0e1374ed
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Add for supporting customer whose still need to use u-boot v2021.04.
Customer can add this line into their include file to build it.
`PREFERRED_VERSION_u-boot-nuvoton ?= "2021.04%"`
Update u-boot-nuvoton 2021.04 srcrev bump b0b0222d39...1501268746
Brian Ma (1):
dts: fix nuvoton-npcm845-pincfg.dtsi typo
Jim Liu (1):
configs: rename arbel defconfig
Parvathi Bhogaraju (2):
Invalidate RX buffer cache before freeing the DMA descriptor.
net: designware: Pass all multicast frames in designware driver
Stanley Chu (6):
cmd: cp: Fix boundary check for spi flash programming
configs: arbel_evb: Use ARM timer as system tick counter
crypto: npcm_sha: Support SHA512
hash: Allow for SHA512 hardware implementations
configs: arbel: Enable SHA512 HW acceleration
crypto: npcm_sha: Support SHA384
Signed-off-by: Tim Lee <timlee660101@gmail.com>
Change-Id: I1b16685b1def6ed0d6dbc0f1cd0d055166ae95f0
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Changelog:
IGPS 04.01.01 - May 21th 2024
============
- bootblock 0.4.8
Set cntfrq_el0 should be after calling serial_printf_init.
IGPS 04.01.00 - May 20th 2024
============
- skmt_map.xml: remove RSA key and add add ECC DER Key instead.
This key should be manifest root key.
- TIP_FW 0.6.9 L0 0.5.8 L1:
* Disable CFM.
* Bug fix: if bootblock is at offset 2MB recovery image is not fully
created. Fix the size of image measurement with the additional gap.
* Manifest root key is the last key in SKMT. Format is ECC DER.
* Hardening: limit up to 100 lines. check return status of hardening.
* In case of assert write to debug log.
* Bug fix: in BMC reset, if the reloading fails BMC will go to recovery.
- Remove MCR 180 from hardening register table.
- Apply one_igps in order to support yocto build with pre-signed image.
Signed-off-by: Tim Lee <timlee660101@gmail.com>
Change-Id: I1e0a2568577acdf79e67d77ae7f2ae7aa3d22c7a
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Changelog:
TIP_FW: 0.6.9 L0 0.5.8 L1
==============
- Disable CFM.
- Bug fix: if bootblock is at offset 2MB recovery image is not fully
created. Fix the size of image measurement with the additional gap.
- Manifest root key is the last key in SKMT. Format is ECC DER.
- Hardening: limit up to 100 lines. check return status of hardening.
- In case of assert write to debug log.
- Bug fix: in BMC reset, if the reloading fails BMC will go to recovery.
Signed-off-by: Tim Lee <timlee660101@gmail.com>
Change-Id: Iea5189eb37d9b5ef2eb0d2fc15c6f6bf8018595d
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Changelog:
TIP_FW: 0.6.8 L0 0.5.7 L1
==============
- Optimize flash read. Include QUAD support code
but currently disabled by default.
- Move TIP FW build version into a separate header file to avoid
conflict with internal build versions.
- Add missing header file include in the uart_if.h to avoid
order dependency.
- Support flash encryption (after code review).
- Update TIP EID back to 0x0B.
- Change version, delay for flush task and PRE_PRODUCTION.
- Put all manifests at the end of flash.
- Check stack overflow.
- Support hardening.
- Support BMC direct access.
- Support bootblock at offset 512KB or 2MB.
- Bug fix: touch WD during recovery delay.
- Bug fix: ENC header field must be 0x03 to start encryption.
- Support CFM.
- WD0RCRB.BMCBUS should be zero.
- Bug fix in handling SW and WD reset (avoid TIP reset).
Tested:
Build pass and boot up successful with correct TIP FW latest version.
Signed-off-by: Tim Lee <timlee660101@gmail.com>
Change-Id: I2af64dd84a7726f2fb3afec53340b6c5d594e870
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Changelog:
IGPS 04.00.08 - Mar 19th 2024
============
- bl31
* remove change clock frequency
- TIP_FW: 0.6.8 L0 0.5.7 L1
* Optimize flash read. Include QUAD support code but currently
disabled by default.
* Move TIP FW build version into a separate header file to avoid
conflict with internal build versions.
* Add missing header file include in the uart_if.h to avoid
order dependency.
* Support flash encryption (after code review).
* Update TIP EID back to 0x0B.
* Change version, delay for flush task and PRE_PRODUCTION.
* Put all manifests at the end of flash.
* Check stack overflow.
* Support hardening.
* Support BMC direct access.
* Support bootblock at offset 512KB or 2MB.
* Bug fix: touch WD during recovery delay.
* Bug fix: ENC header field must be 0x03 to start encryption.
* Support CFM.
* WD0RCRB.BMCBUS should be zero.
* Bug fix in handling SW and WD reset (avoid TIP reset).
- Scripts: fix ReplaceComponent.bat.
- Update comments in bootblock XMLs.
- bootblock 0.4.6
* MC: Increase ECE priority to match VCD priority.
Set ECE priority to 2.
* Fix errata: Errata fix: 1.7 eSPI FATAL_ERROR response
Signed-off-by: Tim Lee <timlee660101@gmail.com>
Change-Id: Ie974c2cebce84e66972533d345fba4fc5b1867d1
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Changelog:
version 0.4.6 - Mar 21th 2024
=============
- MC: Increase ECE priority to match VCD priority.
Set ECE priority to 2.
- Fix errata: Errata fix: 1.7 eSPI FATAL_ERROR response
Signed-off-by: Tim Lee <timlee660101@gmail.com>
Change-Id: I3c62ad3d1c09573e8c087f385eba1a37c21a57e7
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Add `lsusb` to make checking usb devices easier.
Add `timeout` to enable this command feature.
Signed-off-by: Tim Lee <timlee660101@gmail.com>
Change-Id: I817e52cd3ba8c4d58345772f050e1e3bdac2098c
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Signed-off-by: Tim Lee <timlee660101@gmail.com>
Change-Id: I6b053fcecd1a2e7d41566fd5aef87a605dfc7ca2
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rutigl@gmail.com (1):
remove change clock frequency
Signed-off-by: Tim Lee <timlee660101@gmail.com>
Change-Id: I1bcb226e11e81c581f9c5ce0869c86b9642372e0
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Changelog:
version 10.10.19 - Mar 27th 2024
=============
- U-Boot can only be loaded to DRAM from the range 0x100 till end of DRAM.
- Avoid TOCTOU: read destination address and size only once.
- Remove XIP.
Signed-off-by: Tim Lee <timlee660101@gmail.com>
Change-Id: Icd56348f9f2818fb381b91ddbc3fc3e566a9da87
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Add blacklist to avoid i2c lock for evb-npcm845.
Except bus 1 that equip with eeprom for fru.
&i2c1 {
status = "okay";
eeprom@50 {
compatible = "atmel,24c256";
reg = <0x50>;
};
};
Signed-off-by: Tim Lee <timlee660101@gmail.com>
Change-Id: Ida4c42497d60d0b1b5cce8a5e712104929ffc887
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Aligh with the other meta-machine layer rule.
When a bbappend file is already in a meta-machine layer,
there is no reason for extra ":machine" override syntax.
Remove them all in bb/bbappend files.
Signed-off-by: Tim Lee <timlee660101@gmail.com>
Change-Id: I73acca7a0bbaf09f2b058e9e646316eaba40bc36
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John Keeping (1):
fit: Fix verification of images with external data
Stanley Chu (9):
npcm8xx: Use npcm reset driver for reset control.
cmd: spi: Support half duplex transfer
cmd: gfx_test: Fix PCI reset
spi: npcm_pspi: Fix the wrong clock divider calculation
board: arbel: Limit the dram effective size to bank0 maximal size
reset: npcm: Use probe function to initialize priv struct
spi: npcm_pspi: Reset HW in driver probe
misc: npcm_host_intf: Add Arbel eSPI workaround
timer: npcm: Change counter source
James Chiang (1):
configs: arbel: increase u-boot mapping size
Signed-off-by: Tim Lee <timlee660101@gmail.com>
Change-Id: I20c692cbb1e7af3d509d70bca12019facc80aee1
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This append config already include at linux-nuvoton.inc.
No need to add this append here, thus remove it.
Tested:
Build pass and device boot up successfully.
Signed-off-by: Tim Lee <timlee660101@gmail.com>
Change-Id: Ifb72c9eb2df095c48292c6acc304e8a8a072fd03
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Changelog:
version 0.4.3 - Mar 4th 2024
=============
- Bug fix: set cntfrq_el0 according to CPU frequancy.
Previously it was hard-coded to 250000000.
version 0.4.2 - Feb 28th 2024
=============
- MC: modified default priority setting.
- Bug fix: PIXEL clock always connected to PLLG.
- Change CLK_750MHZ_PLLCON0_2_REG_CFG 0x003C2201
- Set DENALI_CTL_91_INLINE_ECC_BANK_OFFSET to 1.
Signed-off-by: Tim Lee <timlee660101@gmail.com>
Change-Id: Ib899e5206142bbf252f57c9f8715a0653596dcae
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IGPS 04.00.07 - Mar 4th 2024
============
- Bootblock 0.4.3
* Bug fix: set cntfrq_el0 according to CPU frequancy.
Previously it was hard-coded to 250000000.
- Uboot
* Use ARM timer as system tick
- Hardening: update CSV parsing, update chip xml and update the tables
* Leave them disable for now. Users may comment out the tables and test.
- Relocate combo 1 offset to key_settings_edit_me.py. Default is 512KB.
- Fix all linux path.
- exit(1) in case of failure in GenerateAll.py
Signed-off-by: Tim Lee <timlee660101@gmail.com>
Change-Id: I70a42dff757fa299d185cc95742c71833f99dd78
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Changelog:
TIP_FW: 0.6.7 L0 0.5.6 L1
==============
- Disable attestation.
- Fix Macronix issue: if BMC changes to wrong command
set FIU_DRD_CFG RD_CMD back to a valid value.
- Move manifests to the end of the flash.
- Format manifests when needed.
- Enhance logging during malloc\stack failure.
- Increase BMC_task stack.
- Limit SKMT to 10 keys (final number TBD).
- Limit KMT to 4 keys (final number is TBD).
- Restore FIU_DRD_CFG (bug fix for Macronix flash).
- Total wipe: enhance logging.
- key_mask: instead of writing 1<<key_index to key_mask:
IGPS sets the relevant bit without changing other bits in key_mask.
Tested:
Build pass and boot up successful with correct TIP FW latest version.
Signed-off-by: Tim Lee <timlee660101@gmail.com>
Change-Id: I694c38127f718e04200d27d15f632b077736d3f8
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Changelog:
version 0.4.1 - Feb 5th 2024
=============
- Set PCI and GFX core clock to PLL1.
version 0.4.0 - Feb 1st 2024
=============
- Bug fix: GMAC frequency always set to 125MHz.
- PCI always 125MHZ, RC always 100MHz.
- If ECC enabled, force both CPU and MC to be the same frequency.
- Add two optional GPIO set after mtest, declared in the IGPS header.
Signed-off-by: Tim Lee <timlee660101@gmail.com>
Change-Id: I85e66aae974f5dc8bc403bc8c6863cf48061d385
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IGPS 04.00.06 - Feb 5th 2024
============
- Bootblock 0.4.1
* Set PCI and GFX core clock to PLL1.
- Add bootblock XML for MS (with GPIO enabled).
- Remove Z1 from signing flows. Add MS signing.
Signed-off-by: Tim Lee <timlee660101@gmail.com>
Change-Id: I5846ba5630771885f36a27fe59a95564f4784f42
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Remove PREFERRED_VERSION_trusted-firmware-a ?= "2.9.%" in npcm8xx.inc,
and create a new 2.10.%.bbappend to align current version in arm layer.
Tested:
Device can boot successfully with correct version as below:
NOTICE: BL31: v2.10.0(release)
Signed-off-by: Tim Lee <timlee660101@gmail.com>
Change-Id: Ie62df7a91f359eac94696b6033543a3a6ef439e3
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default-distrovars.inc depend on ARCH_DEFAULT_KERNELIMAGETYPE
to set KERNEL_IMAGETYPE, vendor could overwrite KERNEL_IMAGETYPE
in configuration file to change kernel target build.
since static-norootfs.inc set KERNEL_IMAGETYPE and KERNEL_IMAGETYPES
as ARCH_DEFAULT_KERNELIMAGETYPE, we overwrite both value to "Image"
since arm64 kernel doesn't support zImage target.
Add FLASH_MANIFEST_OFFSET and merge_bootloader in nuvoton npcm8xx.
Add compress kernel image when build norootfs.
Tested:
build norootfs evb-npcm845 target ok
flash norootfs flash-evb-npcm845 image ok
Signed-off-by: James Chiang <cpchiang1@nuvoton.com>
Signed-off-by: Tim Lee <timlee660101@gmail.com>
Change-Id: I688cd48f2cc43f464e23f4a1f5408ce5b7195c56
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Currently, openbmc upstream already update tfa to version v2.10.0
For compatibling with latest openbmc, we need to fix the version at v2.9.0. Otherwise, we will meet this kind of build error from upstream.
ERROR: No recipes in default available for:
openbmc/meta-nuvoton/dynamic-layers/arm-layer/recipes-bsp/
trusted-firmware-a/trusted-firmware-a_2.9.%.bbappend
Signed-off-by: Tim Lee <timlee660101@gmail.com>
Change-Id: If652ee5478cc9c42e833dd4d2a203d7d5ebddca1
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Make clean meta-evb layer back to description of OpenBMC EVB layer.
Signed-off-by: Tim Lee <timlee660101@gmail.com>
Change-Id: Ia56fc7abfb46615c2150dd4e5acdff801e64a590
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Margarita Glushkin (1):
fix GFX frame buffer memory corruption during secondary boot
Signed-off-by: Tim Lee <timlee660101@gmail.com>
Change-Id: I1fe74d69c13deb3d05d4560754ddce0277ecf6f3
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Signed-off-by: Tim Lee <timlee660101@gmail.com>
Change-Id: Id97b390d735f0df873b7ed479d24391d6c86d582
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Adopt meta-evb-npcm845 from meta-evb layer that make
more clearer about the scope of evb layer's description.
Tested:
/openbmc$ . setup evb-npcm845
Common targets are:
obmc-phosphor-image
Signed-off-by: Tim Lee <timlee660101@gmail.com>
Change-Id: Ib922057b5bce54b864f1c0ced1b132ea1e71fd91
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Changelog:
version 0.3.9 - Nov 29th 2023
=============
- block PLL resetting in secondary boot.
- PLLs are set only after PORST.
(PLLs only, other dividers like FIU are set on any reset).
- Change print of DRAM type.
- Print all values in MHz (instead of Hz).
Signed-off-by: Tim Lee <timlee660101@gmail.com>
Change-Id: I409d725b0e8e93b7e8497a0a20243956ee47571b
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Changelog:
IGPS 03.09.08 - Nov 29th 2023
============
- Write key mask automatically by scripts.
- Bootblock version 0.3.9:
* block PLL resetting in secondary boot.
* PLLs are set only after PORST.
(PLLs only, other dividers like FIU are set on any reset).
* Change print of DRAM type.
* Print all values in MHz (instead of Hz).
- XML:
* XML mark the key_mask area as reserved.
Signed-off-by: Tim Lee <timlee660101@gmail.com>
Change-Id: I2e3b552d540006595d761866a4b489506ae2c3e2
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Bingo_0.0.6 - Jul 24th 2023
==============
- For nibble parity- use only option of singular 0xff or 0x00 mask,
no matter what content format it has.
- For secded parity - no more usage of maskAllSizes,
use only option of singular 0xff or 0x00 mask.
Signed-off-by: Tim Lee <timlee660101@gmail.com>
Change-Id: I705dce3b342ccff89fd9bd65563fc6d80d907835
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Changelog:
version 0.3.8 - Nov 6th 2023
=============
- bootblock output file rename back to arbel_a35_bootblock.bin.
- unused fuse data moved under ifdef.
- Add 3 fields to header (FIU_DRD_CFG for fiu 0, 1, 3).
User can change these values in IGPS. bootblock does not check value is legal
- Cleanup makefile.
version 0.3.7 - Nov 2nd 2023
=============
- Modify the Makefile to ensure compatibility with Linux compilation
and incorporate a build.sh script.
- In NO_TIP mode: if training fails perform FSW to retry.
- In TIP mode: need to use TIP_FW 0.6.5 and up so that TIP will reset MC
before bootblock to ansure no BMC access during reset MC.
- Update timer driver with registers and basic functunality.
- Update FIU divider on every reset, according to header.
- Set RDLEN to 0 on AHB6 and AHB13.
Signed-off-by: Tim Lee <timlee660101@gmail.com>
Change-Id: I581651ed36ef51c01c97312a2be7e438cbc403a5
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Signed-off-by: Patrick Williams <patrick@stwcx.xyz>
Change-Id: I28ee50fa55ae47dd7fd8c99f8f6db8f5f6dfa53d
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Signed-off-by: Patrick Williams <patrick@stwcx.xyz>
Change-Id: I85272779478b66452acd11be93f5fea99e4c3a34
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For features and configurations of npcm845 in OpenBMC.
Tested: build pass and boot successfully.
Signed-off-by: Tim Lee <timlee660101@gmail.com>
Change-Id: I567a6ef62acae992b4e888a4a0d5f90828939c79
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Changelog:
TIP_FW: 0.6.5 L0 0.5.4 L1
==============
* MC reset, if needed, performed synchronously
from TIP side while BMC is in reset.
Add new variable SA_TIP_IMAGE for supporing SA TIP_FW mimic no_tip mode.
SA (Stand Alone) is a special TIP_FW for mimic NO TIP feature on TIP devices.
That's concatenated file image_no_tip + SA FW for mimic NO TIP mode.
Tested:
Build pass and boot up successful with correct TIP FW latest version.
Signed-off-by: Tim Lee <timlee660101@gmail.com>
Change-Id: Ib836cf16f0f14f313b5243e18e8d615e792408b5
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Changelog:
IGPS 03.09.07 - Nov 6 2023
============
- Remove Google TIP_FW. SA FW replaces it.
- Bootblock version 0.3.8:
* bootblock output file rename back to arbel_a35_bootblock.bin.
* unused fuse data moved under ifdef
* Add 3 fields to header (FIU_DRD_CFG for fiu 0, 1, 3).
User can change these values in IGPS.
bootblock does not check value is legal.
* Cleanup makefile.
- XML:
* add FIU_DRD_CFG0, 1, 3 to bootblock headers.
IGPS 03.09.06 - Nov 2 2023
============
- TIP_FW: 0.6.5 L0 0.5.4 L1
* MC reset, if needed, performed synchronously from TIP side
while BMC is in reset.
- Bootblock version 0.3.7
* Modify the Makefile to ensure compatibility with Linux
compilation and incorporate a build.sh script.
* In NO_TIP mode: if training fails perform FSW to retry.
* In TIP mode: need to use TIP_FW 0.6.5 and up so that TIP
will reset MC before bootblock to ensure no BMC access.
* during reset MC.
* Update timer driver with registers and basic functionality.
* Update FIU divider on every reset, according to the header.
* Set RDLEN to 0 on AHB6 and AHB13.
- bl31:
* https://github.com/Nuvoton-Israel/arm-trusted-firmware/releases/tag/v2.9.0
* Fix GFX frame buffer memory corruption during secondary boot.
- Scripts:
* create image_no_tip_SA.bin for A1 mimic no_tip mode
(concatenated file image_no_tip + SA FW).
Tested:
Build pass and boot up successful both TIP and NO TIP mode.
Signed-off-by: Tim Lee <timlee660101@gmail.com>
Change-Id: Ia11b8120b31da4d4da05a9e3034db52a7a17498f
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There are two kinds of PCI device-id for NPCM7xx and NPCM8xx respectively. For NPCM7xx the device-id is using 0x0750 and NPCM8xx is using 0x0850. Thus, change this PCI device-id for supporting NPCM8xx platform.
Use this variable that can help to build host tool burn_my_bmc compatible with different platforms and make in-band firmware update work well.
Signed-off-by: Tim Lee <timlee660101@gmail.com>
Change-Id: I8a23699eab879d3b2620ee47fa9fe46a1e5ef524
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Enable OP-TEE driver in kernel via CONFIG_TEE=y and CONFIG_OPTEE=y
Signed-off-by: Tim Lee <timlee660101@gmail.com>
Change-Id: I4dc7e7d0f0f3239cd2df9422715fe0fc885f591a
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Brian Ma (1):
spi-nor-ids: Add flash model w25q01jv support
Eason Yang (1):
cmd: fuse: casting u32 to u8 if CONFIG_NPCM
Marvin Lin (1):
cmd: Reset GFX PCI before configuration
Stanley Chu (6):
board: arbel: fix incorrect ram size of 4GB dram with ECC enabled
configs: poleg: update supported baud rate
configs: npcm8xx: disable CONFIG_SPI_FLASH_USE_4K_SECTORS
npcm8xx: support dcache off
serial: npcm: Fix wrong register base address
board: nuvoton: arbel: Fix wrong place to set dram bank size
Tim Lee (1):
i2c: npcm: enable support Fast mode
Signed-off-by: Tim Lee <timlee660101@gmail.com>
Change-Id: I182071fd5dff369f716e483ac34e6bec0bb02f3c
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Changelog:
version 0.3.6 - Oct 19th 2023
=============
- Fix SPIX settings. SPIX should be below 33MHz.
It was calculated according to SPI0 and not SPIX, and then set to SPIX.
- Read the DIE information from OTP and place it in SCRACHPAD 72 and 73,
for the OPTEE to read it.
- Bug fix:
return pass status to TIP in secondary reset if training is skipped.
Signed-off-by: Tim Lee <timlee660101@gmail.com>
Change-Id: I6cc76c7750c185f6593da17f779cbd1e68539833
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Changelog:
TIP FW 0.6.4 L0 0.5.3 L1
==============
- Fix DRAM window handling bug, oinorder to allow loading images
to any address in DRAM.
- Fix access for Z1 devices to NCL lib.
- Move tip log to end of recovery flash.
- Support flash encryption. Need to create per die key and enable
in each image header.
- Fix TAG aliign issue.
- Support A35 bootblock reset case.
- Switch to lightweight X.509 and base64 API to remove mbedTLS
from L0 completely.
- Extend key scan option from TIP_ROM to all images.
- Enhance NCL hash porting with SW SHA1 support.
- TIP_SCR0 fix configuration during BMC reset.
- Update OEM table.
- Customize TIP DICE layer 0 to generate ECC-384 device ID
key pair matching ROM.
- Generate counter DICE is missing. Fuse DME and DICE request.
Tested:
Build pass and boot up successful with correct TIP FW latest version.
Signed-off-by: Tim Lee <timlee660101@gmail.com>
Change-Id: I1c523ee6c1a74439354fda76e6a1abf973f32182
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Changelog:
IGPS 03.09.05 - Oct 23 2023
==============
- OPTEE: 0.0.4:
Reading HUK from UUID stored in two scratchpad registers.
- Add UpdateInputBinaries for A2. Files are the same as A1.
- u-boot: v2023.10-npcm8xx-20231023:
First release of npcm-v2023.10.
Fix memory corruption in GFX frame buffer.
- TIP_FW 0.6.4 L0 0.5.3 L1
Fix DRAM window handling bug, in order to allow loading images
to any address in DRAM.
Fix access for Z1 devices to NCL lib.
Move tip log to end of recovery flash.
Support flash encryption. Need to create per die key and enable
in each image header.
Fix TAG alignment issue.
Support A35 bootblock reset case.
Switch to lightweight X.509 and base64 API to remove mbedTLS from
L0 completely.
Extend key scan option from TIP_ROM to all images.
Enhance NCL hash porting with SW SHA1 support.
TIP_SCR0 fix configuration during BMC reset.
Update OEM table.
Customize TIP DICE layer 0 to generate ECC-384 device ID key pair
matching ROM.
Generate counter DICE is missing. Fuse DME and DICE requests.
- Bootblock 0.3.6:
Fix SPIX settings. SPIX should be below 33MHz.
It was calculated according to SPI0 and not SPIX, and then set to SPIX.
Read the DIE information from OTP and place it in SCRACHPAD 72 and 73,
for the OPTEE to read it.
Bug fix: return pass status to TIP in secondary reset if training is skipped.
Tested:
Build pass and boot up successful both TIP and NO TIP mode.
Signed-off-by: Tim Lee <timlee660101@gmail.com>
Change-Id: Id040079d81d3dd77bc57d5857bcd5df930fd503c
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Due to the default trusted-firmware-a version move to 2.9.0, rename
bbappend version and move SRCREV which merged 2.9.0.
Change-Id: I960b93967e353e129eaae474f52bd43ebc917589
Signed-off-by: Brian Ma <chma0@nuvoton.com>
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Stanley Chu (1):
add run_state API
Signed-off-by: Tim Lee <timlee660101@gmail.com>
Change-Id: I41d78074c29ab3b1386137846d2e712025f37a41
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Changelog:
TIP FW 0.6.2 L0 0.5.1 L1
==============
- Release tag: TIP_FW_L0_0.6.2_L1_0.5.1
- Fix trap issue in export found on DC_SCM only.
- Optimize memory usage.
- RSA and RNG code cleanup.
Tested:
Build pass and boot up successful with correct version.
Signed-off-by: Tim Lee <timlee660101@gmail.com>
Change-Id: Ie35d15345fdefbdb9d66801f3ebb70ffc39d776d
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Changelog:
IGPS 03.09.03 - Aug 10th 2023
==============
- Update scripts: fix typos.
- Update scripts: copy all keys always.
To replace a key please remove it from both:
IGPS_..\py_scripts\ImageGeneration\keys
IGPS_..\py_scripts\ImageGeneration\inputs\key_input
Tested:
Build pass and boot up successful both TIP and NO TIP mode.
Signed-off-by: Tim Lee <timlee660101@gmail.com>
Change-Id: I4f364735d393d6c84475fd11f96da14e4b1d7b56
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The RPMB partition of the eMMC on our boards has been written
with a test key from optee-os. As a result, we cannot use the
key from OTP to access RPMB. Thus, we need to remove it.
And add back CFG_REE_FS and CFG_REE_FS_TA support for optee-os.
Tested: build pass and boot successfully then run xtest pass.
Signed-off-by: Tim Lee <timlee660101@gmail.com>
Change-Id: I47ea2f1ba8ed09b34a1530c2b4110d296dd09e11
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Stanley Chu (7):
pinctrl: npcm8xx: sync with upstream driver
pinctrl: npcm8xx: add name for gpio function
board: nuvoton: set console environment variable
serial: npcm: support skip uart initialization
configs: arbel/poleg: support more uart baud rate
watchdog: npcm: fix reset/expire function
dts: npcm8xx: add watchdog
Signed-off-by: Tim Lee <timlee660101@gmail.com>
Change-Id: Id3923f96f68fa0f59f18b7f6d9f533d48d7cb6b1
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Stanley Chu (8):
update README
fix address length issue and compile warning
update README
update log
correct the debug log
update code
check tdo after every svf command.
Print progress
Signed-off-by: Tim Lee <timlee660101@gmail.com>
Change-Id: I912a52e6047b951741b3aef23cc409770c69ba7b
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