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2023-10-12arm64: dts: exynos: Add reserved memory for pstore on E850-96Sam Protsenko1-0/+15
Reserve a 2 MiB memory region to record kmsg dumps, console, ftrace and userspace messages. The implemented memory split allows capturing and reading corresponding ring buffers: * dmesg: 6 dumps, 128 KiB each * console: 128 KiB * ftrace: 128 KiB for each of 8 CPUs (1 MiB total) * userspace messages: 128 KiB Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org> Link: https://lore.kernel.org/r/20231008033633.21304-1-semen.protsenko@linaro.org [krzysztof: move the node to alphabetically sorted position] Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2023-09-14arm64: dts: exynos: remove unused TMU aliasMateusz Majewski1-1/+0
The ID of this alias is checked by the exynos-tmu driver, but isn't used anywhere and omitting it does not cause an error. Indeed, this is the only Exynos device that defines this alias. Signed-off-by: Mateusz Majewski <m.majewski2@samsung.com> Link: https://lore.kernel.org/r/20230911133342.14028-1-m.majewski2@samsung.com Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2023-09-14arm64: dts: exynos: Use pinctrl macros for exynos5433-tm2Jaewon Kim1-1/+1
Use pinctrl macro instead of hard-coded number. This makes the code more readable. Signed-off-by: Jaewon Kim <jaewon02.kim@samsung.com> Link: https://lore.kernel.org/r/20230912055635.49092-1-jaewon02.kim@samsung.com Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2023-09-11arm64: dts: exynos: exynos5433-tm2: switch sound card to audio-routingKrzysztof Kozlowski1-13/+12
"samsung,audio-routing" property is being deprecated, so switch to generic "audio-routing". Link: https://lore.kernel.org/r/20230731095730.204567-1-krzysztof.kozlowski@linaro.org Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2023-09-11arm64: dts: exynos: Enable USB support on E850-96 boardSam Protsenko1-0/+58
The E850-96 board has a micro-USB socket and two USB 2.0 host sockets. The USB role (host or peripheral) is selected automatically depending on micro-USB cable attachment state: - micro-USB cable is attached: USB device role - micro-USB cable is detached: USB host role USB can't act simultaneously as a device and a host, because Exynos850 SoC has only one USB controller and there are no external USB controllers on the E850-96 board. So the USB switch chip (specifically TS3USB221A) connects SoC USB lines either to micro-USB connector or to USB hub chip (LAN9514), w.r.t. micro-USB cable attachment state. When USB works in the host role, Ethernet capability becomes available too, as the LAN9514 chip (providing USB hub) also enables Ethernet PHY and Ethernet MAC. Dynamic role switching is done in gpio-usb-b-connector, using current micro-USB VBUS line level as a trigger: - VBUS=high: SoC USB lines are wired to micro-USB socket - VBUS=low: SoC USB lines are wired to USB hub chip In order to make USB host functional when the board was booted with micro-USB cable disconnected, role-switch-default-mode = "host" is used. One can use E850-96 board schematics [1] to figure out how exactly all related USB hardware connections and lines reflect into corresponding device tree definitions. As PMIC regulators are not implemented yet, we rely on USB LDOs being already enabled in the bootloader. A dummy regulator is provided to "usbdrd" vdd nodes for now. [1] https://www.96boards.org/documentation/consumer/e850-96b/hardware-docs/ Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org> Link: https://lore.kernel.org/r/20230825215445.28309-3-semen.protsenko@linaro.org Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2023-09-11arm64: dts: exynos: Enable USB in Exynos850Sam Protsenko1-0/+30
Add USB controller and USB PHY controller nodes for Exynos850 SoC. The USB controller has next features: - Dual Role Device (DRD) controller - DWC3 compatible - Supports USB 2.0 host and USB 2.0 device interfaces - Supports full-speed (12 Mbps) and high-speed (480 Mbps) modes with USB device 2.0 interface - Supports on-chip USB PHY transceiver - Supports up to 16 bi-directional endpoints (that includes control endpoint 0) - Complies with xHCI 1.00 specification Only USB 2.0 is supported in Exynos850, so only UTMI+ PHY interface is specified in "phys" property (index 0) and PIPE3 is omitted (index 1). Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org> Link: https://lore.kernel.org/r/20230825215445.28309-2-semen.protsenko@linaro.org Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2023-08-06arm64: dts: exynos: exynos5433-tm2: drop redundant status=okayKrzysztof Kozlowski1-1/+0
status=okay is by default. Link: https://lore.kernel.org/r/20230731090821.104733-1-krzysztof.kozlowski@linaro.org Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2023-07-19arm64: dts: exynos: add pwm node for exynosautov9-sadkJaewon Kim2-0/+17
Add pwm node to support fan on exynosautov9-sadk board. PWM channel 3 of ExynosAutov9 is connected to fan for SoC cooling in SADK board. Signed-off-by: Jaewon Kim <jaewon02.kim@samsung.com> Link: https://lore.kernel.org/r/20230718062200.79306-3-jaewon02.kim@samsung.com Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2023-07-10arm64: dts: exynos: minor whitespace cleanup around '='Krzysztof Kozlowski1-4/+4
The DTS code coding style expects exactly one space before and after '=' sign. Reviewed-by: Alim Akhtar <alim.akhtar@samsung.com> Link: https://lore.kernel.org/r/20230702185012.43699-1-krzysztof.kozlowski@linaro.org Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2023-07-10arm64: dts: exynos: add missing space before {Krzysztof Kozlowski1-1/+1
Add missing whitespace between node name/label and opening {. Link: https://lore.kernel.org/r/20230705145942.293527-1-krzysztof.kozlowski@linaro.org Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2023-06-21ARM: dts: Move .dts files to vendor sub-directoriesRob Herring2-2/+2
The arm dts directory has grown to 1559 boards which makes it a bit unwieldy to maintain and use. Past attempts stalled out due to plans to move .dts files out of the kernel tree. Doing that is no longer planned (any time soon at least), so let's go ahead and group .dts files by vendors. This move aligns arm with arm64 .dts file structure. There's no change to dtbs_install as the flat structure is maintained on install. The naming of vendor directories is roughly in this order of preference: - Matching original and current SoC vendor prefix/name (e.g. ti, qcom) - Current vendor prefix/name if still actively sold (SoCs which have been aquired) (e.g. nxp/imx) - Existing platform name for older platforms not sold/maintained by any company (e.g. gemini, nspire) The whole move was scripted with the exception of MAINTAINERS and a few makefile fixups. Acked-by: Viresh Kumar <viresh.kumar@linaro.org> Acked-by: Michal Simek <michal.simek@amd.com> #Xilinx Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Acked-by: Neil Armstrong <neil.armstrong@linaro.org> Acked-by: Paul Barker <paul.barker@sancloud.com> Acked-by: Tony Lindgren <tony@atomide.com> Acked-by: Gregory CLEMENT <gregory.clement@bootlin.com> Acked-by: Heiko Stuebner <heiko@sntech.de> Acked-by: Wei Xu <xuwei5@hisilicon.com> #hisilicon Acked-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Nick Hawkins <nick.hawkins@hpe.com> Acked-by: Baruch Siach <baruch@tkos.co.il> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Acked-by: Peter Rosin <peda@axentia.se> Acked-by: Jesper Nilsson <jesper.nilsson@axis.com> Acked-by: Sudeep Holla <sudeep.holla@arm.com> Acked-by: Florian Fainelli <f.fainelli@gmail.com> #broadcom Acked-by: Manivannan Sadhasivam <mani@kernel.org> Reviewed-by: Jisheng Zhang <jszhang@kernel.org> Acked-by: Patrice Chotard <patrice.chotard@foss.st.com> Acked-by: Romain Perier <romain.perier@gmail.com> Acked-by: Alexandre TORGUE <alexandre.torgue@st.com> Acked-by: Shawn Guo <shawnguo@kernel.org> Acked-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com> Acked-by: Enric Balletbo i Serra <eballetbo@gmail.com> Signed-off-by: Rob Herring <robh@kernel.org>
2023-06-20arm64: dts: exynos: Remove clock from Exynos850 pmu_system_controllerSam Protsenko1-1/+0
As described in the corresponding binding documentation for "samsung,exynos850-pmu", the "clocks" property should be used for specifying CLKOUT mux inputs. Therefore, the clock provided to exynos850 pmu_system_controller is incorrect and should be removed. Instead of making syscon regmap keep that clock running for PMU accesses, it should be made always running in the clock driver, because the kernel is not the only software accessing PMU registers on Exynos850 platform. Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org> Link: https://lore.kernel.org/r/20230308233822.31180-8-semen.protsenko@linaro.org Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20230612180102.289745-1-krzysztof.kozlowski@linaro.org Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2023-03-17arm64: dts: exynos: add mmc aliasesHenrik Grimler3-0/+5
Add aliases for eMMC and SD card where applicable, so that assigned mmc indeces are always the same. Signed-off-by: Henrik Grimler <henrik@grimler.se> Tested-by: Marek Szyprowski <m.szyprowski@samsung.com> Link: https://lore.kernel.org/r/20230315212814.15908-3-henrik@grimler.se Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2023-03-17arm64: dts: exynos: drop mshc aliasesHenrik Grimler2-4/+2
Previously, the mshc0 alias has been necessary so that MMC_CAP_1_8V_DDR | MMC_CAP_8_BIT_DATA are set for mshc_0/mmc_0. However, these capabilities should be described in the device tree so that we do not have to rely on the alias. The property mmc-ddr-1_8v replaces MMC_CAP_1_8V_DDR, while bus_width = <8>, which is already set for all the mshc0/mmc0 nodes, replaces MMC_CAP_8_BIT_DATA. Also drop other mshc aliases as they are not needed. Signed-off-by: Henrik Grimler <henrik@grimler.se> Tested-by: Marek Szyprowski <m.szyprowski@samsung.com> Link: https://lore.kernel.org/r/20230315212814.15908-2-henrik@grimler.se Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2023-03-06arm64: dts: exynos: Add CMU_G3D node for Exynos850 SoCSam Protsenko1-0/+9
Add missing G3D clock domain to Exynos850 SoC device tree. Reviewed-by: Chanho Park <chanho61.park@samsung.com> Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org> Link: https://lore.kernel.org/r/20230223042133.26551-7-semen.protsenko@linaro.org Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2023-03-06arm64: dts: exynos: move MIPI phy to PMU node in Exynos5433Krzysztof Kozlowski1-10/+9
The MIPI phy is actually part of the Power Management Unit system controller. It does not have own address space, thus keeping the node under soc causes warnings: exynos5433-tm2e.dtb: soc@0: video-phy: {'compatible': ['samsung,exynos5433-mipi-video-phy'], ... should not be valid under {'type': 'object'} Tested-by: Marek Szyprowski <m.szyprowski@samsung.com> Link: https://lore.kernel.org/r/20230127194057.186458-9-krzysztof.kozlowski@linaro.org Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2023-01-29arm64: dts: exynos: add unit address to DWC3 node wrapper in Exynos7Krzysztof Kozlowski1-4/+4
Neither simple-bus bindings nor dtc W=1 accept device nodes in soc@ node which do not have unit address. Therefore usethe address space of child device (actual DWC3 Controller) as the wrapper's address to fix: exynos7-espresso.dtb: soc@0: usb: {'compatible': ['samsung,exynos7-dwusb3'], ... should not be valid under {'type': 'object'} Reviewed-by: Alim Akhtar <alim.akhtar@samsung.com> Tested-by: Alim Akhtar <alim.akhtar@samsung.com> Link: https://lore.kernel.org/r/20230127212713.267014-4-krzysztof.kozlowski@linaro.org Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2023-01-29arm64: dts: exynos: add unit address to DWC3 node wrapper in Exynos5433Krzysztof Kozlowski1-8/+8
Neither simple-bus bindings nor dtc W=1 accept device nodes in soc@ node which do not have unit address. Therefore usethe address space of child device (actual DWC3 Controller) as the wrapper's address to fix: exynos5433-tm2e.dtb: soc@0: usbdrd: {'compatible': ['samsung,exynos5433-dwusb3'], ... should not be valid under {'type': 'object'} Tested-by: Marek Szyprowski <m.szyprowski@samsung.com> Link: https://lore.kernel.org/r/20230127212713.267014-3-krzysztof.kozlowski@linaro.org Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2023-01-29arm64: dts: exynos: move exynos-bus nodes out of soc in Exynos5433Krzysztof Kozlowski1-1/+1
The soc node is supposed to have only device nodes with MMIO addresses, as reported by dtc W=1: exynos5433-bus.dtsi:10.20-16.4: Warning (simple_bus_reg): /soc@0/bus0: missing or empty reg/ranges property and dtbs_check: exynos5433-tm2.dtb: soc@0: bus1: {'compatible': ['samsung,exynos-bus'], 'clocks': [[21, 220]], 'clock-names': ['bus'], 'operating-points-v2': [[165]], 'status': ['okay'], 'devfreq': [[166]]} should not be valid under {'type': 'object'} Move the bus nodes and their OPP tables out of SoC to fix this. Link: https://lore.kernel.org/r/20230125094513.155063-8-krzysztof.kozlowski@linaro.org Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2023-01-28arm64: dts: exynos: use lowercase hex addressesKrzysztof Kozlowski3-10/+10
By convention the hex addresses should be lowercase. Link: https://lore.kernel.org/r/20230125094513.155063-9-krzysztof.kozlowski@linaro.org Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2023-01-28arm64: dts: exynos: correct wlf,micd-dbtime on TM2Krzysztof Kozlowski1-1/+1
The wlf,micd-dbtime property of WM5110 codec can be either 2 or 4 (driver ignores other values, so assume author wanted something here): exynos5433-tm2e.dtb: audio-codec@0: wlf,micd-dbtime:0:0: 1 is not one of [2, 4] Link: https://lore.kernel.org/r/20230120173116.341270-6-krzysztof.kozlowski@linaro.org Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2023-01-28arm64: dts: exynos: add interrupt-controller to WM5110 on TM2Krzysztof Kozlowski1-0/+2
The WM5110 bindings expect node to be interrupt controller: exynos5433-tm2.dtb: audio-codec@0: 'interrupt-controller' is a required property exynos5433-tm2.dtb: audio-codec@0: '#interrupt-cells' is a required property Link: https://lore.kernel.org/r/20230120173116.341270-5-krzysztof.kozlowski@linaro.org Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2023-01-28arm64: dts: exynos: add VPH_PWR regulator on TM2Krzysztof Kozlowski1-2/+11
VPH_PWR is routed to battery, so it is not configurable. However few devices, e.g. WM5110 expect speaker power supplies, thus provide the regulator for full hardware description. Audio amplifier also accepts that power supply. Keep ordering the nodes by renaming existing IRDA regulator. This fixes dtbs_check warnings: exynos5433-tm2e.dtb: audio-codec@0: 'SPKVDDL-supply' is a required property exynos5433-tm2e.dtb: audio-codec@0: 'SPKVDDR-supply' is a required property Link: https://lore.kernel.org/r/20230120173116.341270-4-krzysztof.kozlowski@linaro.org Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2023-01-28arm64: dts: exynos: correct Bluetooth LED triger on E850-96Krzysztof Kozlowski1-1/+1
Switch source of LED activity to hci0-power from RX, to match bindings (same effect expected): exynos850-e850-96.dtb: leds: led-5:linux,default-trigger: 'oneOf' conditional failed, one must be fixed: 'hci0rx' is not one of ['backlight', 'default-on', 'heartbeat', 'disk-activity', 'ide-disk', 'timer', 'pattern'] 'hci0rx' does not match '^cpu[0-9]*$' 'hci0rx' does not match '^hci[0-9]+-power$' 'hci0rx' does not match '^mmc[0-9]+$' 'hci0rx' does not match '^phy[0-9]+tx$' Link: https://lore.kernel.org/r/20230120173116.341270-3-krzysztof.kozlowski@linaro.org Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2023-01-28arm64: dts: exynos: add ADC supply on Exynos7 EspressoKrzysztof Kozlowski1-0/+1
ADC requires supply and it seems LDO3 (same as on Exynos5433 TM2 boards) fits in voltage range of 1.8 V. Use it to silence warning: exynos7-espresso.dtb: adc@13620000: 'vdd-supply' is a required property Link: https://lore.kernel.org/r/20230120173116.341270-2-krzysztof.kozlowski@linaro.org Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Alim Akhtar <alim.akhtar@samsung.com>
2023-01-28arm64: dts: exynos: disable non-working GPU on Exynos7 EspressoKrzysztof Kozlowski1-1/+0
The Panfrost GPU drivers require clock but such was not provided in Exynos7 DTSI. The CMU_G3D clock controller was not upstreamed, thus consider GPU as non-working and simply disable it to silence warnings like: exynos7-espresso.dtb: gpu@14ac0000: 'clocks' is a required property Link: https://lore.kernel.org/r/20230120173116.341270-1-krzysztof.kozlowski@linaro.org Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Alim Akhtar <alim.akhtar@samsung.com>
2023-01-23arm64: dts: exynos: drop unsupported UFS properties in ExynosAutov9 SADKKrzysztof Kozlowski1-2/+0
There is no vcc-fixed-regulator property for UFS nodes: exynosautov9-sadk.dtb: ufs@17e00000: Unevaluated properties are not allowed ('vcc-fixed-regulator' was unexpected) Link: https://lore.kernel.org/r/20230120130108.278851-1-krzysztof.kozlowski@linaro.org Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2023-01-10arm64: dts: exynos: drop unsupported I2C properties in EspressoKrzysztof Kozlowski1-2/+0
The Samsung HSI2C (High Speed I2C) bindings do not allow samsung,i2c-sda-delay (present in older S3C24xx I2C bindings): exynos7-espresso.dtb: i2c@13660000: Unevaluated properties are not allowed ('samsung,i2c-sda-delay', 'samsung,i2c-max-bus-freq' were unexpected) Link: https://lore.kernel.org/r/20221204190543.143986-1-krzysztof.kozlowski@linaro.org Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2022-12-26arm64: dts: exynos: add dedicated SYSREG compatibles to Exynosautov9Sriranjani P1-3/+6
Exynosautov9 has several different SYSREGs, so use dedicated compatibles for them. Signed-off-by: Sriranjani P <sriranjani.p@samsung.com> Reviewed-by: Chanho Park <chanho61.park@samsung.com> Link: https://lore.kernel.org/r/20221214044342.49766-5-sriranjani.p@samsung.com Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2022-12-26arm64: dts: exynos: add dedicated SYSREG compatibles to Exynos850Sriranjani P1-2/+4
Exynos850 has two different SYSREGs, so use dedicated compatibles for them. Signed-off-by: Sriranjani P <sriranjani.p@samsung.com> Reviewed-by: Sam Protsenko <semen.protsenko@linaro.org> Link: https://lore.kernel.org/r/20221214044342.49766-3-sriranjani.p@samsung.com Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2022-12-26arm64: dts: exynos: correct properties of MAX98504 in TM2Krzysztof Kozlowski1-4/+4
Drop unused and unsupported MAX98504 amplifier properties (maxim,rx-path and similar) and add two supplies. Link: https://lore.kernel.org/r/20221204113839.151816-3-krzysztof.kozlowski@linaro.org Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2022-12-26arm64: dts: exynos: drop clock-frequency from CPU nodes in TM2Krzysztof Kozlowski1-8/+0
The CPU frequencies are determined by OPP table, so drop the 'clock-frequency' property. It is not parsed by any driver. Link: https://lore.kernel.org/r/20221204113839.151816-2-krzysztof.kozlowski@linaro.org Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2022-12-26arm64: dts: exynos: drop pwm-names from MAX77843 haptic in TM2Krzysztof Kozlowski1-1/+0
MAX77843 haptic driver does not take 'pwm-names' property: exynos5433-tm2.dtb: pmic@66: motor-driver: 'pwm-names' does not match any of the regexes: 'pinctrl-[0-9]+' Link: https://lore.kernel.org/r/20221204113839.151816-1-krzysztof.kozlowski@linaro.org Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2022-12-26arm64: dts: exynos: use 8-bit for SPI IR LED duty-cycle in TM2Krzysztof Kozlowski1-1/+1
The 'duty-cycle' of SPI IR LED property is u8: exynos/exynos5433-tm2e.dtb: irled@0: duty-cycle:0: [0, 0, 0, 60] is too long Link: https://lore.kernel.org/r/20221204104242.117558-1-krzysztof.kozlowski@linaro.org Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2022-12-26arm64: dts: exynos: add dedicated SYSREG compatibles to Exynos5433Krzysztof Kozlowski1-4/+8
Exynos5433 has several different SYSREGs, so use dedicated compatibles for them. Reviewed-by: Sam Protsenko <semen.protsenko@linaro.org> Reviewed-by: Alim Akhtar <alim.akhtar@samsung.com> Reviewed-by: Sriranjani P <sriranjani.p@samsung.com> Link: https://lore.kernel.org/r/20221127123259.20339-1-krzysztof.kozlowski@linaro.org Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2022-12-26arm64: dts: exynos: Update cache propertiesPierre Gondois2-0/+6
The DeviceTree Specification v0.3 specifies that the cache node 'compatible' and 'cache-level' properties are 'required'. Cf. s3.8 Multi-level and Shared Cache Nodes The 'cache-unified' property should be present if one of the properties for unified cache is present ('cache-size', ...). Update the Device Trees accordingly. Signed-off-by: Pierre Gondois <pierre.gondois@arm.com> Link: https://lore.kernel.org/r/20221123092449.88097-2-pierre.gondois@arm.com Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2022-10-04Merge tag 'samsung-dt-dt64-6.1-2' of ↵Arnd Bergmann1-1/+1
https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into arm/dt Samsung DTS ARM and ARM64 changes for v6.1 Late cleanup and fixes for Samsung DTS: 1. Fix polarity of pins: - enable GPIO of NFC chip in Exynos5433 TM2 boards, - vbus GPIO of EHCI in Exynos4412 Origen board. 2. Correct name of pin configuration nodes - redundant "pins" in the name (no functional impact). * tag 'samsung-dt-dt64-6.1-2' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux: ARM: dts: s5pv210: correct double "pins" in pinmux node ARM: dts: exynos: fix polarity of VBUS GPIO of Origen arm64: dts: exynos: fix polarity of "enable" line of NFC chip in TM2 Link: https://lore.kernel.org/r/20221003073916.12588-1-krzysztof.kozlowski@linaro.org Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2022-09-30arm64: dts: exynos: fix polarity of "enable" line of NFC chip in TM2Dmitry Torokhov1-1/+1
According to s3fwrn5 driver code the "enable" GPIO line is driven "high" when chip is not in use (mode is S3FWRN5_MODE_COLD), and is driven "low" when chip is in use. s3fwrn5_phy_power_ctrl(): ... gpio_set_value(phy->gpio_en, 1); ... if (mode != S3FWRN5_MODE_COLD) { msleep(S3FWRN5_EN_WAIT_TIME); gpio_set_value(phy->gpio_en, 0); msleep(S3FWRN5_EN_WAIT_TIME); } Therefore the line described by "en-gpios" property should be annotated as "active low". The wakeup gpio appears to have correct polarity (active high). Signed-off-by: Dmitry Torokhov <dmitry.torokhov@gmail.com> Link: https://lore.kernel.org/r/20220929011557.4165216-1-dmitry.torokhov@gmail.com Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2022-08-23arm64: dts: exynos: Add SysMMU nodes for Exynos850Sam Protsenko1-0/+45
Add all SysMMU nodes to Exynos850 SoC device tree. Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20220809113323.29965-10-semen.protsenko@linaro.org
2022-08-23arm64: dts: exynos: Add CMU_AUD, CMU_IS and CMU_MFCMSCL for Exynos850Sam Protsenko1-0/+38
Add missing clock domains to Exynos850 SoC device tree. Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20220809113323.29965-9-semen.protsenko@linaro.org
2022-08-23arm64: dts: exynosautov9: add fsys0/1 clock DT nodesChanho Park1-0/+28
Add cmu_fsys0 and cmu_fsys1 for PCIe clocks and USB/MMC clocks respectively. Signed-off-by: Chanho Park <chanho61.park@samsung.com> Reviewed-by: Chanwoo Choi <cw00.choi@samsung.com> [krzk: put nodes ordered by unit address] Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/50f8145bca30cf5c900359d0b78c1c617090e021.1659054220.git.chanho61.park@samsung.com
2022-07-07Merge tag 'samsung-dt64-5.20-2' of ↵Arnd Bergmann3-8/+1087
git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into arm/dt Samsung DTS ARM64 changes for v5.20, part two 1. Correct SPI11 pin names on ExynosAutov9. 2. Add more USI (I2C/SPI/UART) devices to ExynosAutov9. * tag 'samsung-dt64-5.20-2' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux: arm64: dts: exynosautov9: add usi device tree nodes arm64: dts: exynosautov9: prepare usi0 changes arm64: dts: exynosautov9: add pdma0 device tree node dt-bindings: soc: samsung: usi: add exynosautov9-usi compatible arm64: dts: exynosautov9: correct spi11 pin names Link: https://lore.kernel.org/r/20220707080408.69251-2-krzysztof.kozlowski@linaro.org Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2022-07-05arm64: dts: exynosautov9: add usi device tree nodesChanho Park1-0/+1067
Universal Serial Interface (USI) supports three types of serial interface such as Universal Asynchronous Receiver and Transmitter (UART), Serial Peripheral Interface (SPI), and Inter-Integrated Circuit (I2C). Each protocols can be working independently and configured as one of those using external configuration inputs. Exynos Auto v9 SoC support 12 USIs. When a USI uses two pins such as i2c and 3 wire uarts(RX/TX only), we can use remain two pins as i2c mode. So, we can define one USI node that includes serial/spi and hsi2c. usi_i2c nodes can be used only for i2c mode. We can have below combinations for one USI. 1) The usi node is used either 4 pin uart or 4 pin spi -> No usi_i2c can be used 2) The usi node is used 2 pin uart(RX/TX) and i2c(SDA/SCL) -> usi_i2c should be enabled to use the latter i2c 3) The usi node is used i2c(SDA/SCL) and i2c(SDA/SCL) -> usi_i2c should be enabled to use the latter i2c By default, all USIs are initially set to uart mode by below setting. samsung,mode = <USI_V2_UART>; You can change it either USI_V2_SPI or USI_V2_I2C. Signed-off-by: Chanho Park <chanho61.park@samsung.com> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20220701015226.32781-6-chanho61.park@samsung.com
2022-07-05arm64: dts: exynosautov9: prepare usi0 changesChanho Park2-5/+7
Before adding whole USI nodes, this applies the changes of usi0 in advance. To be the usi0 and serian_0 nodes as SoC default, some properties should be moved to exynosautov9-sadk.dts. Signed-off-by: Chanho Park <chanho61.park@samsung.com> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20220701015226.32781-5-chanho61.park@samsung.com
2022-07-05arm64: dts: exynosautov9: add pdma0 device tree nodeChanho Park1-0/+10
Add an ARM pl330 dma controller DT node as pdma0. Signed-off-by: Chanho Park <chanho61.park@samsung.com> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20220701015226.32781-4-chanho61.park@samsung.com
2022-07-05arm64: dts: exynosautov9: correct spi11 pin namesChanho Park1-3/+3
They should be started with "gpp5-". Fixes: 31bbac5263aa ("arm64: dts: exynos: add initial support for exynosautov9 SoC") Signed-off-by: Chanho Park <chanho61.park@samsung.com> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20220627005832.8709-1-chanho61.park@samsung.com
2022-07-01Merge tag 'samsung-dt64-5.20' of ↵Arnd Bergmann12-53/+271
git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into arm/dt Samsung DTS ARM64 changes for v5.20 1. Add CPU cache, UFS to Tesla FSD. 2. Add reboot-mode (boot into specific bootloader mode) to ExynosAutov9. 3. Add watchdogs to ExynosAutov9. 4. Add eMMC to Exynos7885 JackpotLTE (Samsung Galaxy A8). 5. DTS cleanup: white-spaces, node names, LED color/function. 6. Switch to DTS-local header for pinctrl register values instead of bindings header. The bindings header is being deprecated because it does not reflect the purpose of bindings. * tag 'samsung-dt64-5.20' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux: arm64: dts: exynos: Add internal eMMC support to jackpotlte dt-bindings: clock: Add indices for Exynos7885 TREX clocks dt-bindings: clock: Add bindings for Exynos7885 CMU_FSYS arm64: dts: exynos: enable secondary ufs devices ExynosAutov9 SADK arm64: dts: exynos: add secondary ufs devices in ExynosAutov9 arm64: dts: fsd: use local header for pinctrl register values arm64: dts: exynos: use local header for pinctrl register values arm64: dts: exynos: align MMC node name with dtschema arm64: dts: exynos: adjust DT style of ufs nodes in ExynosAutov9 arm64: dts: exynos: adjust whitespace around '=' arm64: dts: fsd: add ufs device node arm64: dts: exynos: add watchdog in ExynosAutov9 arm64: dts: exynos: add syscon reboot/reboot_mode support in ExynosAutov9 dt-bindings: soc: add samsung,boot-mode definitions arm64: dts: fsd: Add cpu cache information Link: https://lore.kernel.org/r/20220624080746.31947-2-krzysztof.kozlowski@linaro.org Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2022-06-24Merge branch 'for-v5.20/exynos7885-emmc-clk' into next/dt64Krzysztof Kozlowski2-0/+52
2022-06-20arm64: dts: exynos: Add internal eMMC support to jackpotlteDavid Virag2-0/+52
Add the nodes relevant to provide clocks for Exynos7885 eMMC and to support eMMC. eMMC is the internal storage used in the Samsung Galaxy A8 (2018) (jackpotlte), and all other known devices using the Exynos7885 SoC. Signed-off-by: David Virag <virag.david003@gmail.com> Link: https://lore.kernel.org/r/20220601233743.56317-6-virag.david003@gmail.com Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2022-06-07arm64: dts: exynos: enable secondary ufs devices ExynosAutov9 SADKChanho Park1-0/+18
Enable ufs_1_phy and ufs_1 devices with ufs_1_fixed_vcc_reg regulator. Signed-off-by: Chanho Park <chanho61.park@samsung.com> Link: https://lore.kernel.org/r/20220607070251.15795-3-chanho61.park@samsung.com Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
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