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2024-02-22arm64: dts: renesas: r8a779g0: Correct avb[01] reg sizesGeert Uytterhoeven1-2/+2
All Ethernet AVB instances on R-Car V4H have registers related to UDP/IP support, but the declared register blocks for the first two instances are too small to cover them. Fix this by extending the register block sizes. Fixes: 848c82db56923a8b ("arm64: dts: renesas: r8a779g0: Add RAVB nodes") Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/83437778614a7c96f4d8f1be98dffeee29bb4a0b.1707660323.git.geert+renesas@glider.be
2024-02-06arm64: dts: renesas: Improve TMU interrupt descriptionsGeert Uytterhoeven1-4/+13
Add the input capture interrupt on Timer Unit instances that have it. Add "interrupt-names" properties for clarity. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/5c70ad8c2ea14333616c5add31a4a958f4a47081.1705325654.git.geert+renesas@glider.be
2024-01-31arm64: dts: renesas: r8a779g0: Add missing SCIF_CLK2Geert Uytterhoeven1-3/+9
R-Car V4H actually has two SCIF_CLK pins. The second pin provides the SCIF_CLK signal for HSCIF2 and SCIF4. Fixes: a4c31c56d2d35641 ("arm64: dts: renesas: r8a779g0: Add SCIF nodes") Fixes: 39d9dfc6fbe1860e ("arm64: dts: renesas: r8a779g0: Add remaining HSCIF nodes") Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/72f20c1bf32187bd30a963cafe27252907d661f9.1705589612.git.geert+renesas@glider.be
2024-01-22arm64: dts: renesas: r8a779g0: Restore sort orderGeert Uytterhoeven1-36/+36
Numerical by unit address, alphabetical by node name. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/f00ef274a73c8fd60f940a1649423a8927b9ae8a.1705324708.git.geert+renesas@glider.be
2023-04-04arm64: dts: renesas: r8a779g0: Add iommus to MMC nodeYoshihiro Shimoda1-0/+1
Add iommus property to the MMC node for r8a779g0. Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Tested-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/20230123013448.1250991-6-yoshihiro.shimoda.uh@renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2023-04-04arm64: dts: renesas: r8a779g0: Add iommus to DMAC nodesYoshihiro Shimoda1-0/+16
Add iommus properties to the DMAC nodes for r8a779g0. Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/20230123013448.1250991-5-yoshihiro.shimoda.uh@renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2023-04-04arm64: dts: renesas: r8a779g0: Add IPMMU nodesYoshihiro Shimoda1-0/+109
Add IPMMU nodes for r8a779g0. Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Link: https://lore.kernel.org/r/20230123013448.1250991-4-yoshihiro.shimoda.uh@renesas.com [geert: Drop indices from renesas,ipmmu-main properties] [geert: s/hsc/hc/, s/vc0/vc/] Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2023-03-10arm64: dts: renesas: r8a779g0: R-Car Sound supportKuninori Morimoto1-0/+76
Add sound support for R-Car V4H. Signed-off-by: Linh Phung <linh.phung.jy@renesas.com> Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/87pm9ll9ue.wl-kuninori.morimoto.gx@renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2023-03-06arm64: dts: renesas: r8a779g0: Add and connect all CSI-2, ISP and VIN nodesNiklas Söderlund1-0/+666
The V4H have 16 VIN, 2 CSI-2 and 2 ISP nodes that interact with each other for video capture. Add all nodes and record how they are interconnected. Signed-off-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/20230211150012.3824154-2-niklas.soderlund+renesas@ragnatech.se Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2023-03-06arm64: dts: renesas: r8a779g0: Add thermal nodesGeert Uytterhoeven1-0/+70
Add device nodes for the Thermal Sensor/Chip Internal Voltage Monitor/Core Voltage Monitor (THS/CIVM/CVM) and the various thermal zones on the Renesas R-Car V4H (R8A779G0) SoC. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se> Link: https://lore.kernel.org/r/b92a1a28afb9f75f24f0137af9f77e95d7ebaec3.1675959327.git.geert+renesas@glider.be
2023-03-06arm64: dts: renesas: Drop specifying the GIC_CPU_MASK_SIMPLE() for GICv3 systemsLad Prabhakar1-6/+5
The GICv3 interrupts binding does not have a cpumask. The CPU mask only applies to pre-GICv3. So just drop using them from GICv3 systems. Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/20230206002136.29401-1-prabhakar.mahadev-lad.rj@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2023-03-06arm64: dts: renesas: r8a779g0: Add CAN-FD nodeGeert Uytterhoeven1-0/+57
Add device nodes for the CAN-FD interface and the related external CAN clock on the Renesas R-Car V4H (R8A779G0) SoC. Based on a patch in the BSP by Kazuya Mizuguch. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/6c55d0995089917216ee261a8b8cbb980c7b5304.1674500205.git.geert+renesas@glider.be
2023-01-26arm64: dts: renesas: r8a779g0: Add Cortex-A76 1.8 GHz oppGeert Uytterhoeven1-0/+6
Add an operating point for running the Cortex-A76 CPU cores on R-Car V4H at 1.8 GHz (High Performance mode). Based on a patch in the BSP by Tho Vu. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/cc2bae27776523f499d01655ef18fe463a3ae1ae.1670492384.git.geert+renesas@glider.be
2023-01-10arm64: dts: renesas: r8a779g0: Add display related nodesTomi Valkeinen1-0/+130
Add DT nodes for components needed to get the DSI output working: - FCPv - VSPd - DU - DSI Signed-off-by: Tomi Valkeinen <tomi.valkeinen+renesas@ideasonboard.com> Reviewed-by: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com> Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/20221201095631.89448-5-tomi.valkeinen+renesas@ideasonboard.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2022-11-17arm64: dts: renesas: r8a779g0: Add CA76 operating pointsGeert Uytterhoeven1-0/+31
Add operating points for running the Cortex-A76 CPU cores on R-Car V4H at various speeds, up to the Normal (1.7 GHz) performance mode. Based on a patch in the BSP by Tho Vu. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/8afb32f5dc123ebf2b941703483152ff0992191d.1668429870.git.geert+renesas@glider.be
2022-11-17arm64: dts: renesas: r8a779g0: Add CPU core clocksGeert Uytterhoeven1-0/+4
Describe the clocks for the four Cortex-A76 CPU cores. CA76 Sub-Systems 0/1 (both clusters / all CPU cores) are clocked by Z0φ. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/aa6e9ae21e451ebd40d54d986bd0296571128d5b.1668429870.git.geert+renesas@glider.be
2022-11-17arm64: dts: renesas: r8a779g0: Add CPUIdle supportGeert Uytterhoeven1-0/+17
Support CPUIdle for ARM Cortex-A76 on R-Car V4H. Based on patches in the BSP by Tho Vu and Vincent Bryce. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/f6d4076983eb45cf23595a045747f28cbdcdf4e6.1668429870.git.geert+renesas@glider.be
2022-11-17arm64: dts: renesas: r8a779g0: Add secondary CA76 CPU coresGeert Uytterhoeven1-5/+65
Complete the description of the Cortex-A76 CPU cores and L3 cache controllers on the Renesas R-Car V4H (R8A779G0) SoC, including CPU topology and PSCI support for enabling CPU cores. R-Car V4H has 4 Cortex-A76 cores, grouped in 2 clusters. Based on a patch in the BSP by Takeshi Kihara. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/ccb55458bd87f8ba70d28c61bcc254f22184824c.1668429870.git.geert+renesas@glider.be
2022-11-17arm64: dts: renesas: r8a779g0: Add L3 cache controllerGeert Uytterhoeven1-0/+8
Describe the cache configuration for the first Cortex-A76 CPU core on the Renesas R-Car V4H (R8A779G0) SoC. Extracted from a larger patch in the BSP by Takeshi Kihara. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/dfd743b32198295afb78bc0ac337ef283fa3879a.1668429870.git.geert+renesas@glider.be
2022-11-08arm64: dts: renesas: r8a779g0: Add CMT nodeThanh Quan1-0/+70
Signed-off-by: Thanh Quan <thanh.quan.xn@renesas.com> [wsa: merged the fixes into this one and rebased] Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Link: https://lore.kernel.org/r/20221104151135.4706-3-wsa+renesas@sang-engineering.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2022-11-08arm64: dts: renesas: r8a779g0: Add TMU nodesWolfram Sang1-0/+65
Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Link: https://lore.kernel.org/r/20221103205546.24836-3-wsa+renesas@sang-engineering.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2022-10-24arm64: dts: renesas: r8a779g0: Add remaining HSCIF nodesGeert Uytterhoeven1-3/+53
Add device nodes for the remaining High Speed Serial Communication Interfaces with FIFO (HSCIF) on the Renesas R-Car V4H (R8A779G0) SoC, including DMA support. Reformat the existing HSCIF0 node for consistency. Based on patches in the BSP by Takeshi Kihara and Vinh Nguyen. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Link: https://lore.kernel.org/r/64c15b2d13439b2072cde0b588a251cb54f7dc01.1666361314.git.geert+renesas@glider.be
2022-10-24arm64: dts: renesas: r8a779g0: Add SCIF nodesGeert Uytterhoeven1-0/+68
Add device nodes for the Serial Communication Interfaces with FIFO (SCIF) on the Renesas R-Car V4H (R8A779G0) SoC, including DMA support. Based on patches in the BSP by Takeshi Kihara and Vinh Nguyen. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Link: https://lore.kernel.org/r/3f0ad7ce0fedfca2783001a6eb3eca96aea72115.1666361314.git.geert+renesas@glider.be
2022-10-17arm64: dts: renesas: r8a779g0: Add RPC nodeHai Pham1-0/+16
Add a device node for the SPI Multi I/O Bus Controller (RPC-IF) on the Renesas R-Car V4H (R8A779G0) SoC. Signed-off-by: Hai Pham <hai.pham.ud@renesas.com> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Link: https://lore.kernel.org/r/6da7a035d56a943336f68dc0da77a47dba3dd69e.1665583435.git.geert+renesas@glider.be
2022-10-17arm64: dts: renesas: r8a779g0: Add SDHI nodeGeert Uytterhoeven1-0/+14
Add a device node for the SD Card/MMC Interface on the Renesas R-Car V4H (R8A779G0) SoC. Based on a patch in the BSP by Takeshi Kihara. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Link: https://lore.kernel.org/r/d2d5cf982a380699483edf7a632441628ee73183.1665558371.git.geert+renesas@glider.be
2022-10-17arm64: dts: renesas: r8a779g0: Add TPU device nodeCongDang1-0/+11
Add a device node for the 16-Bit Timer Pulse Unit (TPU) on the Renesas R-Car V4H (R8A779G0) SoC. Signed-off-by: CongDang <cong.dang.xn@renesas.com> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Link: https://lore.kernel.org/r/b98acb22fdd1bcc6a9ca8a4255f85e04c571975c.1665156417.git.geert+renesas@glider.be
2022-10-17arm64: dts: renesas: r8a779g0: Add PWM device nodesCongDang1-0/+100
Add device nodes for the PWM timers on the Renesas R-Car V4H (R8A779G0) SoC. Signed-off-by: CongDang <cong.dang.xn@renesas.com> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/6a2df8c9f751993ae40aa8f196f4124e384b0aab.1665156417.git.geert+renesas@glider.be
2022-10-17arm64: dts: renesas: r8a779g0: Fix HSCIF0 "brg_int" clockGeert Uytterhoeven1-1/+1
As serial communication requires a clock signal, the High Speed Serial Communication Interfaces with FIFO (HSCIF) are clocked by a clock that is not affected by Spread Spectrum or Fractional Multiplication. Hence change the clock input for the HSCIF0 Baud Rate Generator internal clock from the S0D3_PER clock to the SASYNCPERD1 clock (which has the same clock rate), cfr. R-Car V4H Hardware User's Manual rev. 0.54. Fixes: 987da486d84a5643 ("arm64: dts: renesas: Add Renesas R8A779G0 SoC support") Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Link: https://lore.kernel.org/r/a5bd4148f92806f7c8e577d383370f810315f586.1665155947.git.geert+renesas@glider.be
2022-10-17arm64: dts: renesas: r8a779g0: Add INTC-EX nodeGeert Uytterhoeven1-0/+16
Add the device node for the Interrupt Controller for External Devices (INTC-EX) on the Renesas R-Car V4H (R8A779G0) SoC, which serves external IRQ pins IRQ[0-5]. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/f2e5adf62a7666db7350d9596a907bc7f9e81d43.1664369015.git.geert+renesas@glider.be
2022-10-17arm64: dts: renesas: r8a779g0: Add MSIOF nodesGeert Uytterhoeven1-0/+96
Add device nodes for the Clock-Synchronized Serial Interfaces with FIFO (MSIOF) on the Renesas R-Car V4H (R8A779G0) SoC, including DMA support. Based on patches in the BSP by Thanh Quan. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/450921ef6d8c30ca2953a1665c8597f6a69d01f2.1664204771.git.geert+renesas@glider.be
2022-10-17arm64: dts: renesas: r8a779g0: Add DMA supportGeert Uytterhoeven1-0/+91
Add device nodes for the Direct Memory Access Controllers for System (SYS-DMAC) on the Renesas R-Car V4H (R8A779G0) SoC. Link all DMA consumers to the corresponding DMA controller channels. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/1ea45b51f897a11d9477be4ac54fdb0efcc624e1.1664204771.git.geert+renesas@glider.be
2022-09-19arm64: dts: renesas: r8a779g0: Add RAVB nodesGeert Uytterhoeven1-0/+141
Add device nodes for the Renesas Ethernet AVB (EtherAVB-IF) blocks on the Renesas R-Car V4H (R8A779G0) SoC. Based on a larger patch in the BSP by Takeshi Kihara. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/980e7a62d8dc3a1e2387a2d93a6296625b105506.1662715538.git.geert+renesas@glider.be
2022-09-19arm64: dts: renesas: r8a779g0: Add GPIO nodesGeert Uytterhoeven1-0/+135
Add device nodes for the General Purpose Input/Output (GPIO) blocks on the Renesas R-Car V4H (R8A779G0) SoC. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/81176a5e12a5828cdcdd4b107d0b2e5970232c31.1662715538.git.geert+renesas@glider.be
2022-09-18arm64: dts: renesas: r8a779g0: Add I2C nodesGeert Uytterhoeven1-0/+84
Add device nodes for the I2C Bus Interfaces on the Renesas R-Car V4H (R8A779G0) SoC. Extracted from a larger patch in the BSP by Takeshi Kihara. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/272fd18fed2d7addfbdb7945ae2134988a7c3a7e.1662715538.git.geert+renesas@glider.be
2022-09-18arm64: dts: renesas: r8a779g0: Add pinctrl device nodeGeert Uytterhoeven1-0/+9
Add a device node for the Pin Function Controller on the Renesas R-Car V4H (R8A779G0) SoC. Based on a larger patch in the BSP by Takeshi Kihara. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/ecddcadd2fad46b1cf4c9be3ec750f360b9730e4.1662715538.git.geert+renesas@glider.be
2022-09-18arm64: dts: renesas: r8a779g0: Add RWDT nodeGeert Uytterhoeven1-0/+11
Add a device node for the RCLK Watchdog Timer (RWDT) on the Renesas R-Car V4H (R8A779G0) SoC. Based on a patch in the BSP by Thanh Quan. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/187904c279be6654ea3deb11b7250b64dd18c3b5.1662715538.git.geert+renesas@glider.be
2022-08-29arm64: dts: renesas: r8a779g0: Fix HSCIF0 interrupt numberGeert Uytterhoeven1-1/+1
The interrupt number for the HSCIF0 serial port, which serves as the serial console on the White Hawk board, is incorrect, causing userspace to hang immediately as soon as it tries to print something. Kernel output is unaffected, as it is printed using polling. Fixes: 987da486d84a5643 ("arm64: dts: renesas: Add Renesas R8A779G0 SoC support") Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Link: https://lore.kernel.org/r/751dcef40d4534e856ed49b1d5b3a3e8d365ec42.1661419377.git.geert+renesas@glider.be
2022-05-06arm64: dts: renesas: Add Renesas R8A779G0 SoC supportYoshihiro Shimoda1-0/+122
Add initial support for the Renesas R8A779G0 (R-Car V4H) SoC. Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Link: https://lore.kernel.org/r/20220428135058.597586-3-yoshihiro.shimoda.uh@renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
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