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starfive-tech/linux.git
JH7100_VisionFive_OH_dev
JH7110_VisionFive2_510_devel
JH7110_VisionFive2_6.1.y_devel
JH7110_VisionFive2_6.6.y_devel
JH7110_VisionFive2_devel
JH7110_VisionFive2_upstream
beaglev-5.13.y
beaglev_fedora_devel
buildroot-upstream
esmil_starlight
fedora-vic-7100_5.10.6
master
openwrt-6.1.y
rt-ethercat-release
rt-linux-release
rtthread_AMP
starfive-5.13
starfive-5.15-dubhe
starfive-6.1-dubhe
starfive-6.1.65-dubhe
starfive-6.6.10-dubhe
starfive-6.6.31-dubhe
starlight-5.14.y
visionfive
visionfive-5.13.y-devel
visionfive-5.15.y
visionfive-5.15.y-devel
visionfive-5.15.y_fedora_devel
visionfive-5.16.y
visionfive-5.17.y
visionfive-5.18.y
visionfive-5.19.y
visionfive-6.4.y
visionfive_fedora_devel
StarFive Tech Linux Kernel for VisionFive (JH7110) boards (mirror)
Andrey V.Kosteltsev
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path:
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arch
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x86
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include
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asm
/
perf_event.h
Age
Commit message (
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Author
Files
Lines
2022-04-05
perf/x86/intel: Don't extend the pseudo-encoding to GP counters
Kan Liang
1
-0
/
+5
2022-02-02
perf/x86/intel: Increase max number of the fixed counters
Kan Liang
1
-1
/
+1
2021-06-17
perf/x86: Reset the dirty counter to prevent the leak for an RDPMC task
Kan Liang
1
-0
/
+1
2021-02-01
perf/x86/intel: Add perf core PMU support for Sapphire Rapids
Kan Liang
1
-2
/
+6
2021-02-01
perf/x86/intel: Filter unsupported Topdown metrics event
Kan Liang
1
-2
/
+8
2021-01-27
x86/perf: Use static_call for x86_pmu.guest_get_msrs
Like Xu
1
-5
/
+1
2020-11-09
perf/x86/intel: Make anythread filter support conditional
Stephane Eranian
1
-1
/
+3
2020-09-10
perf/x86/amd/ibs: Support 27-bit extended Op/cycle counter
Kim Phillips
1
-0
/
+1
2020-08-18
perf/x86/intel: Support TopDown metrics on Ice Lake
Kan Liang
1
-0
/
+2
2020-08-18
perf/x86: Add a macro for RDPMC offset of fixed counters
Kan Liang
1
-0
/
+3
2020-08-18
perf/x86/intel: Generic support for hardware TopDown metrics
Kan Liang
1
-0
/
+47
2020-08-18
perf/x86/intel: Move BTS index to 47
Kan Liang
1
-2
/
+2
2020-08-18
perf/x86/intel: Introduce the fourth fixed counter
Kan Liang
1
-3
/
+20
2020-08-18
perf/x86/intel: Name the global status bit in NMI handler
Kan Liang
1
-10
/
+12
2020-07-08
perf/x86/intel/lbr: Support XSAVES/XRSTORS for LBR context switch
Kan Liang
1
-4
/
+0
2020-07-08
perf/x86/intel/lbr: Unify the stored format of LBR information
Kan Liang
1
-5
/
+1
2020-07-08
perf/x86: Expose CPUID enumeration bits for arch LBR
Kan Liang
1
-0
/
+40
2020-07-02
perf/x86: Add constraint to create guest LBR event without hw counter
Like Xu
1
-1
/
+21
2020-07-02
perf/x86/lbr: Add interface to get LBR information
Like Xu
1
-0
/
+12
2020-03-17
perf/amd/uncore: Add support for Family 19h L3 PMU
Kim Phillips
1
-2
/
+13
2020-01-13
perf/x86: Provide stubs of KVM helpers for non-Intel CPUs
Sean Christopherson
1
-7
/
+15
2019-08-30
perf/x86/amd/ibs: Fix sample bias for dispatched micro-ops
Kim Phillips
1
-4
/
+8
2019-04-29
perf/x86: Make perf callchains work without CONFIG_FRAME_POINTER
Kairui Song
1
-6
/
+1
2019-04-16
perf/x86/intel: Add Icelake support
Kan Liang
1
-1
/
+1
2019-04-16
perf/x86/intel: Support adaptive PEBS v4
Kan Liang
1
-0
/
+43
2019-04-16
perf/x86: Support outputting XMM registers
Kan Liang
1
-0
/
+5
2018-10-02
Merge branch 'x86/cache' into perf/core, to resolve conflicts
Ingo Molnar
1
-0
/
+1
2018-10-02
perf/x86/amd/uncore: Set ThreadMask and SliceMask for L3 Cache perf events
Natarajan, Janakarajan
1
-0
/
+8
2018-09-28
perf/x86: Add helper to obtain performance counter index
Reinette Chatre
1
-0
/
+1
2017-11-02
License cleanup: add SPDX GPL-2.0 license identifier to files with no license
Greg Kroah-Hartman
1
-0
/
+1
2016-04-28
perf/x86/intel/pt: Don't die on VMXON
Alexander Shishkin
1
-0
/
+4
2016-03-08
perf/x86/intel: Add definition for PT PMI bit
Stephane Eranian
1
-0
/
+1
2015-08-04
x86: Add new MSRs and MSR bits used for Intel Skylake PMU support
Andi Kleen
1
-0
/
+7
2014-11-12
perf/x86/amd/ibs: Update IBS MSRs and feature definitions
Aravind Gopalakrishnan
1
-0
/
+3
2014-08-13
perf/x86: Revamp PEBS event selection
Andi Kleen
1
-0
/
+8
2013-06-19
perf/x86/intel: Add simple Haswell PMU support
Andi Kleen
1
-0
/
+3
2013-02-16
perf/x86/amd: Enable northbridge performance counters on AMD family 15h
Jacob Shin
1
-0
/
+9
2013-02-06
perf/x86/amd: Use proper naming scheme for AMD bit field definitions
Jacob Shin
1
-2
/
+2
2012-08-10
perf: Factor __output_copy to be usable with specific copy function
Frederic Weisbecker
1
-0
/
+2
2012-07-31
perf/x86: Fix USER/KERNEL tagging of samples properly
Peter Zijlstra
1
-3
/
+8
2012-07-26
perf/x86: Fix missing struct before structure name
Jovi Zhang
1
-1
/
+1
2012-07-05
perf/x86: Add a microcode revision check for SNB-PEBS
Peter Zijlstra
1
-0
/
+2
2012-07-05
perf/x86/amd: Unify AMD's generic and family 15h pmus
Robert Richter
1
-2
/
+1
2012-07-05
perf/x86: Rename Intel specific macros
Robert Richter
1
-9
/
+8
2012-05-14
perf/x86/ibs: Fix undefined reference to `get_ibs_caps'
Robert Richter
1
-0
/
+4
2012-05-09
perf/x86-ibs: Take instruction pointer from ibs sample
Robert Richter
1
-2
/
+4
2012-05-09
Merge branch 'perf/x86-ibs' into perf/core
Ingo Molnar
1
-0
/
+2
2012-03-29
Merge branch 'kvm-updates/3.4' of git://git.kernel.org/pub/scm/virt/kvm/kvm
Linus Torvalds
1
-0
/
+1
2012-03-08
KVM: PMU: warn when pin control is set in eventsel msr
Gleb Natapov
1
-0
/
+1
2012-03-08
perf/x86: Implement 64-bit counter support for IBS
Robert Richter
1
-0
/
+2
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