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path: root/drivers/net/wireless/realtek/rtl8xxxu/rtl8xxxu_regs.h
AgeCommit message (Expand)AuthorFilesLines
2023-05-15wifi: rtl8xxxu: Rename some registersBitterblue Smith1-4/+4
2023-05-15wifi: rtl8xxxu: Support new chip RTL8192FUBitterblue Smith1-0/+39
2023-05-05wifi: rtl8xxxu: Allow creating interface in AP modeMartin Kaistra1-0/+2
2023-05-05wifi: rtl8xxxu: Add beacon functionsMartin Kaistra1-0/+3
2023-03-20wifi: rtl8xxxu: Support new chip RTL8710BU aka RTL8188GUBitterblue Smith1-0/+44
2023-02-13wifi: rtl8xxxu: Add LED control code for RTL8192EUBitterblue Smith1-0/+2
2023-02-13wifi: rtl8xxxu: Add LED control code for RTL8188EUBitterblue Smith1-0/+4
2022-12-21wifi: rtl8xxxu: Support new chip RTL8188EUJes Sorensen1-2/+38
2022-11-16wifi: rtl8xxxu: Use u32_get_bits in *_identify_chipBitterblue Smith1-1/+0
2022-11-16wifi: rtl8xxxu: Name some bits used in burst initBitterblue Smith1-0/+6
2022-11-04wifi: rtl8xxxu: Fix the CCK RSSI calculationBitterblue Smith1-0/+3
2022-11-04wifi: rtl8xxxu: Add central frequency offset trackingBitterblue Smith1-0/+1
2022-10-04wifi: rtl8xxxu: Support new chip RTL8188FUBitterblue Smith1-0/+19
2021-10-05rtl8xxxu: Use lower tx rates for the ack packetChris Chiu1-0/+2
2019-06-05treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 295Thomas Gleixner1-9/+1
2017-01-20rtl8xxxu: Update author/maintainer contact infoJes Sorensen1-1/+1
2016-09-17rtl8xxxu: Implement 8192e specific power down sequenceJes Sorensen1-0/+1
2016-09-03rtl8xxxu: Add interrupt bit definitions for gen2 partsJes Sorensen1-0/+56
2016-09-03rtl8xxxu: Add bit definitions for REG_FPGA0_TX_INFOJes Sorensen1-0/+4
2016-06-29rtl8xxxu: Add additional documentation for RX DMA registersJes Sorensen1-3/+7
2016-06-29rtl8xxxu: Add bit definitions for REG_USB_SPECIAL_OPTIONJes Sorensen1-0/+4
2016-04-15rtl8xxxu: Update copyright statement to include 2016Jes Sorensen1-1/+1
2016-04-15rtl8xxxu: Use descriptive bits for setting RX paths for 1T2R partsJes Sorensen1-0/+4
2016-04-15rtl8xxxu: Implement generic init_queue_reserved_page() functionJes Sorensen1-1/+1
2016-04-14rtl8xxxu: Adjust AFE crystal value on 8192euJes Sorensen1-0/+4
2016-04-14rtl8xxxu: Implement IQK calibration for 8192euJes Sorensen1-0/+1
2016-04-14rtl8xxxu: Implement 8192eu device specific quirksJes Sorensen1-0/+1
2016-04-14rtl8xxxu: Set REG_USB_HRPWM for 8192euJes Sorensen1-0/+1
2016-04-07rtl8xxxu: Update some register definitionsJes Sorensen1-7/+24
2016-03-10rtl8xxxu: Flush FIFO before powering down devicesJes Sorensen1-0/+2
2016-03-10rtl8xxxu: Implement device specific power_off functionJes Sorensen1-0/+2
2016-03-10rtl8xxxu: Use define for REG_PWR_DATA bitsJes Sorensen1-1/+1
2016-03-10rtl8xxxu: RF_T_METER is different on the newer chipsJes Sorensen1-6/+7
2016-03-10rtl8xxxu: Implement init_statistics for 8723buJes Sorensen1-0/+7
2016-03-10rtl8xxxu: Setup RX aggregationJes Sorensen1-0/+1
2016-03-10rtl8xxxu: Add REG_DWBCN1_CTRL_8723B defineJes Sorensen1-0/+2
2016-03-10rtl8xxxu: Initialize burst parameters for 8723buJes Sorensen1-1/+4
2016-03-10rtl8xxxu: Implement 8723bu power on sequenceJes Sorensen1-0/+11
2016-03-10rtl8xxxu: Improve 8723bu init codeJes Sorensen1-1/+4
2016-03-10rtl8xxxu: Initial rtl8723bu_init_bt() codeJes Sorensen1-0/+2
2016-03-10rtl8xxxu: Initial implementation of rtl8723bu_config_channel()Jes Sorensen1-0/+14
2016-03-10rtl8xxxu: First stab at adding IQK calibration for 8723bu partsJes Sorensen1-0/+17
2016-03-10rtl8xxxu: Add a couple of new register definitionsJes Sorensen1-0/+6
2016-03-10rtl8xxxu: Add some missing register definitions for 8723buJes Sorensen1-1/+7
2016-03-10rtl8xxxu: Init REG_HIMR[01] for 8192eu partsJes Sorensen1-0/+4
2016-03-10rtl8xxxu: Kludge to drop incorrect USB OUT EP for 8192EUJes Sorensen1-0/+1
2016-03-10rtl8xxxu: Add rtl8xxxu_auto_llt_table()Jes Sorensen1-0/+3
2016-03-10rtl8xxxu: Implment rtl8192eu_power_on()Jes Sorensen1-0/+6
2016-03-10rtl8xxxu: Identify chip vendors correctlyJes Sorensen1-0/+4
2016-02-25rtl8xxxu: Add missing bit define for REG_APS_FSMCOJes Sorensen1-0/+1
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