summaryrefslogtreecommitdiff
path: root/drivers/gpu/drm/i915/intel_pm.c
AgeCommit message (Expand)AuthorFilesLines
2021-05-18Merge drm/drm-next into drm-intel-nextRodrigo Vivi1-1/+1
2021-05-15drm/i915/adl_p: Implement Wa_22011091694José Roberto de Souza1-1/+11
2021-05-15drm/i915/xelpd: Increase maximum watermark lines to 255Matt Roper1-4/+11
2021-05-05drm/i915: Don't include intel_de.h from intel_display_types.hVille Syrjälä1-0/+1
2021-04-28Merge tag 'drm-next-2021-04-28' of git://anongit.freedesktop.org/drm/drmLinus Torvalds1-240/+302
2021-04-28Fix misc new gcc warningsLinus Torvalds1-1/+1
2021-04-21drm/i915: Polish for_each_dbuf_slice()Ville Syrjälä1-22/+12
2021-04-21drm/i915: Use intel_dbuf_slice_size()Ville Syrjälä1-6/+3
2021-04-21drm/i915: Store dbuf slice mask in device infoVille Syrjälä1-4/+9
2021-04-21drm/i915: Handle dbuf bypass path allocation earlierVille Syrjälä1-8/+1
2021-04-21drm/i915: Collect dbuf device info into a sub-structVille Syrjälä1-7/+7
2021-04-20drm/i915/pm: Make the wm parameter of print_wm_latency a pointerJason Ekstrand1-1/+1
2021-04-19Merge tag 'topic/intel-gen-to-ver-2021-04-19' of git://anongit.freedesktop.or...Rodrigo Vivi1-24/+24
2021-04-14drm/i915/display: rename display version macrosLucas De Marchi1-24/+24
2021-04-14drm/i915/display: Eliminate IS_GEN9_{BC,LP}Matt Roper1-4/+4
2021-04-12drm/i915/display: Implement Wa_14013723622José Roberto de Souza1-0/+5
2021-04-12drm/i915: Don't zero out the Y plane's watermarksVille Syrjälä1-2/+2
2021-04-09drm/i915: Don't zero out the Y plane's watermarksVille Syrjälä1-2/+2
2021-04-08drm/i915/display: Eliminate IS_GEN9_{BC,LP}Matt Roper1-4/+4
2021-03-29drm/i915: rename DISP_STEPPING->DISPLAY_STEP and GT_STEPPING->GT_STEPJani Nikula1-1/+1
2021-03-29drm/i915: switch KBL to the new stepping schemeJani Nikula1-2/+2
2021-03-26drm/i915: Fix transposed arguments to skl_plane_wm_level()Ville Syrjälä1-2/+2
2021-03-24drm/i915/display: Simplify GLK display version testsMatt Roper1-9/+7
2021-03-24drm/i915: Convert INTEL_GEN() to DISPLAY_VER() as appropriate in intel_pm.cMatt Roper1-66/+66
2021-03-17drm/i915: Workaround async flip + VT-d corruption on HSW/BDWVille Syrjälä1-1/+15
2021-03-12drm/i915: s/plane_res_b/blocks/ etc.Ville Syrjälä1-101/+97
2021-03-12drm/i915: Extract skl_check_wm_level() and skl_check_nv12_wm_level()Ville Syrjälä1-23/+35
2021-03-12drm/i915: Calculate min_ddb_alloc for trans_wmVille Syrjälä1-3/+5
2021-03-12drm/i915: Check SAGV wm min_ddb_alloc rather than plane_res_bVille Syrjälä1-1/+1
2021-03-12drm/i915: Tighten SAGV constraint for pre-tglVille Syrjälä1-4/+16
2021-03-12drm/i915: Workaround async flip + VT-d corruption on HSW/BDWVille Syrjälä1-1/+15
2021-03-03drm/i915: Check tgl+ SAGV watermarks properlyVille Syrjälä1-2/+2
2021-03-03drm/i915: Introduce SAGV transtion watermarkVille Syrjälä1-33/+61
2021-03-03drm/i915: Stuff SAGV watermark into a sub-structureVille Syrjälä1-15/+15
2021-03-03drm/i915: Print wm changes if sagv_wm0 changesVille Syrjälä1-1/+2
2021-03-03drm/i915: Zero out SAGV wm when we don't have enough DDB for itVille Syrjälä1-5/+6
2021-03-03drm/i915: Fix TGL+ plane SAGV watermark programmingVille Syrjälä1-23/+37
2021-02-17drm/i915: Remove dead code from skl_pipe_wm_get_hw_state()José Roberto de Souza1-3/+0
2021-02-08drm/i915: migrate skl planes code new file (v5)Dave Airlie1-0/+1
2021-02-02Merge tag 'topic/adl-s-enabling-2021-02-01-1' of git://anongit.freedesktop.or...Jani Nikula1-1/+1
2021-01-29drm/i915: Rename is_16gb_dimm to wm_lv_0_adjust_neededJosé Roberto de Souza1-1/+1
2021-01-26drm/i915: Do a bit more initial readout for dbufVille Syrjälä1-2/+48
2021-01-26drm/i915: Encapsulate dbuf state handling harderVille Syrjälä1-246/+138
2021-01-26drm/i915: Extract intel_crtc_dbuf_weights()Ville Syrjälä1-55/+88
2021-01-26drm/i915: Add pipe ddb entries into the dbuf stateVille Syrjälä1-11/+8
2021-01-26drm/i915: Introduce skl_ddb_entry_for_slices()Ville Syrjälä1-37/+18
2021-01-26drm/i915: Introduce intel_dbuf_slice_size()Ville Syrjälä1-15/+21
2021-01-26drm/i915: Pass the crtc to skl_compute_dbuf_slices()Ville Syrjälä1-12/+10
2021-01-26drm/i915: Extract intel_crtc_ddb_weight()Ville Syrjälä1-18/+27
2021-01-20drm/i915/tgl: Use TGL stepping info for applying WAsAditya Swarup1-1/+1
generated by cgit v1.2.3 (git 2.39.0) at 2024-07-12 12:08:34 +0300